10/578 fields covered.
Toggle registers CONFR0JPEG codec configuration register 0
Offset: 0x0, size: 32, reset: 0x00000000, access: write-only
0/1 fields covered.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 STARTBit 0: Start.
CONFR1JPEG codec configuration register 1
Offset: 0x4, size: 32, reset: 0x00000000, access: read-write
0/6 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 YSIZEBits 0-1: Number of color components.
DEBit 3: Decoding Enable.
COLORSPACEBits 4-5: Color Space.
NSBits 6-7: Number of components for Scan.
HDRBit 8: Header Processing.
YSIZEBits 16-31: Y Size.
CONFR2JPEG codec configuration register 2
Offset: 0x8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 NMCUBits 0-25: Number of MCU.
CONFR3JPEG codec configuration register 3
Offset: 0xc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 XSIZEBits 16-31: X size.
CONFR4JPEG codec configuration register 4
Offset: 0x10, size: 32, reset: 0x00000000, access: read-write
0/6 fields covered.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 HSFBit 0: Huffman DC.
HABit 1: Huffman AC.
QTBits 2-3: Quantization Table.
NBBits 4-7: Number of Block.
VSFBits 8-11: Vertical Sampling Factor.
HSFBits 12-15: Horizontal Sampling Factor.
CONFR5JPEG codec configuration register 5
Offset: 0x14, size: 32, reset: 0x00000000, access: read-write
0/6 fields covered.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 HSFBit 0: Huffman DC.
HABit 1: Huffman AC.
QTBits 2-3: Quantization Table.
NBBits 4-7: Number of Block.
VSFBits 8-11: Vertical Sampling Factor.
HSFBits 12-15: Horizontal Sampling Factor.
CONFR6JPEG codec configuration register 6
Offset: 0x18, size: 32, reset: 0x00000000, access: read-write
0/6 fields covered.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 HSFBit 0: Huffman DC.
HABit 1: Huffman AC.
QTBits 2-3: Quantization Table.
NBBits 4-7: Number of Block.
VSFBits 8-11: Vertical Sampling Factor.
HSFBits 12-15: Horizontal Sampling Factor.
CONFR7JPEG codec configuration register 7
Offset: 0x1c, size: 32, reset: 0x00000000, access: read-write
0/6 fields covered.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 HSFBit 0: Huffman DC.
HABit 1: Huffman AC.
QTBits 2-3: Quantization Table.
NBBits 4-7: Number of Block.
VSFBits 8-11: Vertical Sampling Factor.
HSFBits 12-15: Horizontal Sampling Factor.
CRJPEG control register
Offset: 0x30, size: 32, reset: 0x00000000, access: Unspecified
2/11 fields covered.
Toggle fields JCENBit 0: JPEG Core Enable.
IFTIEBit 1: Input FIFO Threshold Interrupt Enable.
IFNFIEBit 2: Input FIFO Not Full Interrupt Enable.
OFTIEBit 3: Output FIFO Threshold Interrupt Enable.
OFNEIEBit 4: Output FIFO Not Empty Interrupt Enable.
EOCIEBit 5: End of Conversion Interrupt Enable.
HPDIEBit 6: Header Parsing Done Interrupt Enable.
IDMAENBit 11: Input DMA Enable.
ODMAENBit 12: Output DMA Enable.
IFFBit 13: Input FIFO Flush.
OFFBit 14: Output FIFO Flush.
SRJPEG status register
Offset: 0x34, size: 32, reset: 0x00000000, access: read-only
7/7 fields covered.
Toggle fields IFTFBit 1: Input FIFO Threshold Flag.
IFNFFBit 2: Input FIFO Not Full Flag.
OFTFBit 3: Output FIFO Threshold Flag.
OFNEFBit 4: Output FIFO Not Empty Flag.
EOCFBit 5: End of Conversion Flag.
HPDFBit 6: Header Parsing Done Flag.
COFBit 7: Codec Operation Flag.
CFRJPEG clear flag register
Offset: 0x38, size: 32, reset: 0x00000000, access: write-only
0/2 fields covered.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CHPDFBit 5: Clear End of Conversion Flag.
CHPDFBit 6: Clear Header Parsing Done Flag.
DIRJPEG data input register
Offset: 0x40, size: 32, reset: 0x00000000, access: write-only
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DATAINBits 0-31: Data Input FIFO.
DORJPEG data output register
Offset: 0x44, size: 32, reset: 0x00000000, access: read-only
1/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DATAOUTBits 0-31: Data Output FIFO.
QMEM0[0]JPEG quantization tables
Offset: 0x50, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[1]JPEG quantization tables
Offset: 0x54, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[2]JPEG quantization tables
Offset: 0x58, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[3]JPEG quantization tables
Offset: 0x5c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[4]JPEG quantization tables
Offset: 0x60, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[5]JPEG quantization tables
Offset: 0x64, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[6]JPEG quantization tables
Offset: 0x68, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[7]JPEG quantization tables
Offset: 0x6c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[8]JPEG quantization tables
Offset: 0x70, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[9]JPEG quantization tables
Offset: 0x74, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[10]JPEG quantization tables
Offset: 0x78, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[11]JPEG quantization tables
Offset: 0x7c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[12]JPEG quantization tables
Offset: 0x80, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[13]JPEG quantization tables
Offset: 0x84, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[14]JPEG quantization tables
Offset: 0x88, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM0[15]JPEG quantization tables
Offset: 0x8c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[0]JPEG quantization tables
Offset: 0x90, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[1]JPEG quantization tables
Offset: 0x94, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[2]JPEG quantization tables
Offset: 0x98, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[3]JPEG quantization tables
Offset: 0x9c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[4]JPEG quantization tables
Offset: 0xa0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[5]JPEG quantization tables
Offset: 0xa4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[6]JPEG quantization tables
Offset: 0xa8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[7]JPEG quantization tables
Offset: 0xac, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[8]JPEG quantization tables
Offset: 0xb0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[9]JPEG quantization tables
Offset: 0xb4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[10]JPEG quantization tables
Offset: 0xb8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[11]JPEG quantization tables
Offset: 0xbc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[12]JPEG quantization tables
Offset: 0xc0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[13]JPEG quantization tables
Offset: 0xc4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[14]JPEG quantization tables
Offset: 0xc8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM1[15]JPEG quantization tables
Offset: 0xcc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[0]JPEG quantization tables
Offset: 0xd0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[1]JPEG quantization tables
Offset: 0xd4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[2]JPEG quantization tables
Offset: 0xd8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[3]JPEG quantization tables
Offset: 0xdc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[4]JPEG quantization tables
Offset: 0xe0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[5]JPEG quantization tables
Offset: 0xe4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[6]JPEG quantization tables
Offset: 0xe8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[7]JPEG quantization tables
Offset: 0xec, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[8]JPEG quantization tables
Offset: 0xf0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[9]JPEG quantization tables
Offset: 0xf4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[10]JPEG quantization tables
Offset: 0xf8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[11]JPEG quantization tables
Offset: 0xfc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[12]JPEG quantization tables
Offset: 0x100, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[13]JPEG quantization tables
Offset: 0x104, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[14]JPEG quantization tables
Offset: 0x108, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM2[15]JPEG quantization tables
Offset: 0x10c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[0]JPEG quantization tables
Offset: 0x110, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[1]JPEG quantization tables
Offset: 0x114, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[2]JPEG quantization tables
Offset: 0x118, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[3]JPEG quantization tables
Offset: 0x11c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[4]JPEG quantization tables
Offset: 0x120, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[5]JPEG quantization tables
Offset: 0x124, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[6]JPEG quantization tables
Offset: 0x128, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[7]JPEG quantization tables
Offset: 0x12c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[8]JPEG quantization tables
Offset: 0x130, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[9]JPEG quantization tables
Offset: 0x134, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[10]JPEG quantization tables
Offset: 0x138, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[11]JPEG quantization tables
Offset: 0x13c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[12]JPEG quantization tables
Offset: 0x140, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[13]JPEG quantization tables
Offset: 0x144, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[14]JPEG quantization tables
Offset: 0x148, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
QMEM3[15]JPEG quantization tables
Offset: 0x14c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 QMem_RAMBits 0-31: QMem RAM.
HUFFMIN[0]JPEG HuffMin tables
Offset: 0x150, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[1]JPEG HuffMin tables
Offset: 0x154, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[2]JPEG HuffMin tables
Offset: 0x158, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[3]JPEG HuffMin tables
Offset: 0x15c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[4]JPEG HuffMin tables
Offset: 0x160, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[5]JPEG HuffMin tables
Offset: 0x164, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[6]JPEG HuffMin tables
Offset: 0x168, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[7]JPEG HuffMin tables
Offset: 0x16c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[8]JPEG HuffMin tables
Offset: 0x170, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[9]JPEG HuffMin tables
Offset: 0x174, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[10]JPEG HuffMin tables
Offset: 0x178, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[11]JPEG HuffMin tables
Offset: 0x17c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[12]JPEG HuffMin tables
Offset: 0x180, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[13]JPEG HuffMin tables
Offset: 0x184, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[14]JPEG HuffMin tables
Offset: 0x188, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFMIN[15]JPEG HuffMin tables
Offset: 0x18c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 HuffMin_RAMBits 0-31: HuffMin RAM.
HUFFBASE[0]JPEG HuffSymb tables
Offset: 0x190, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[1]JPEG HuffSymb tables
Offset: 0x194, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[2]JPEG HuffSymb tables
Offset: 0x198, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[3]JPEG HuffSymb tables
Offset: 0x19c, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[4]JPEG HuffSymb tables
Offset: 0x1a0, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[5]JPEG HuffSymb tables
Offset: 0x1a4, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[6]JPEG HuffSymb tables
Offset: 0x1a8, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[7]JPEG HuffSymb tables
Offset: 0x1ac, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[8]JPEG HuffSymb tables
Offset: 0x1b0, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[9]JPEG HuffSymb tables
Offset: 0x1b4, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[10]JPEG HuffSymb tables
Offset: 0x1b8, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[11]JPEG HuffSymb tables
Offset: 0x1bc, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[12]JPEG HuffSymb tables
Offset: 0x1c0, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[13]JPEG HuffSymb tables
Offset: 0x1c4, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[14]JPEG HuffSymb tables
Offset: 0x1c8, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[15]JPEG HuffSymb tables
Offset: 0x1cc, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[16]JPEG HuffSymb tables
Offset: 0x1d0, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[17]JPEG HuffSymb tables
Offset: 0x1d4, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[18]JPEG HuffSymb tables
Offset: 0x1d8, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[19]JPEG HuffSymb tables
Offset: 0x1dc, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[20]JPEG HuffSymb tables
Offset: 0x1e0, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[21]JPEG HuffSymb tables
Offset: 0x1e4, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[22]JPEG HuffSymb tables
Offset: 0x1e8, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[23]JPEG HuffSymb tables
Offset: 0x1ec, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[24]JPEG HuffSymb tables
Offset: 0x1f0, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[25]JPEG HuffSymb tables
Offset: 0x1f4, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[26]JPEG HuffSymb tables
Offset: 0x1f8, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[27]JPEG HuffSymb tables
Offset: 0x1fc, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[28]JPEG HuffSymb tables
Offset: 0x200, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[29]JPEG HuffSymb tables
Offset: 0x204, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[30]JPEG HuffSymb tables
Offset: 0x208, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFBASE[31]JPEG HuffSymb tables
Offset: 0x20c, size: 32, reset: 0x00000000, access: read-write
0/2 fields covered.
Toggle fields HuffBase_RAM_0Bits 0-8: HuffBase RAM.
HuffBase_RAM_1Bits 16-24: HuffBase RAM.
HUFFSYMB[0]JPEG HUFFSYMB tables
Offset: 0x210, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[1]JPEG HUFFSYMB tables
Offset: 0x214, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[2]JPEG HUFFSYMB tables
Offset: 0x218, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[3]JPEG HUFFSYMB tables
Offset: 0x21c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[4]JPEG HUFFSYMB tables
Offset: 0x220, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[5]JPEG HUFFSYMB tables
Offset: 0x224, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[6]JPEG HUFFSYMB tables
Offset: 0x228, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[7]JPEG HUFFSYMB tables
Offset: 0x22c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[8]JPEG HUFFSYMB tables
Offset: 0x230, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[9]JPEG HUFFSYMB tables
Offset: 0x234, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[10]JPEG HUFFSYMB tables
Offset: 0x238, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[11]JPEG HUFFSYMB tables
Offset: 0x23c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[12]JPEG HUFFSYMB tables
Offset: 0x240, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[13]JPEG HUFFSYMB tables
Offset: 0x244, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[14]JPEG HUFFSYMB tables
Offset: 0x248, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[15]JPEG HUFFSYMB tables
Offset: 0x24c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[16]JPEG HUFFSYMB tables
Offset: 0x250, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[17]JPEG HUFFSYMB tables
Offset: 0x254, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[18]JPEG HUFFSYMB tables
Offset: 0x258, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[19]JPEG HUFFSYMB tables
Offset: 0x25c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[20]JPEG HUFFSYMB tables
Offset: 0x260, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[21]JPEG HUFFSYMB tables
Offset: 0x264, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[22]JPEG HUFFSYMB tables
Offset: 0x268, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[23]JPEG HUFFSYMB tables
Offset: 0x26c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[24]JPEG HUFFSYMB tables
Offset: 0x270, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[25]JPEG HUFFSYMB tables
Offset: 0x274, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[26]JPEG HUFFSYMB tables
Offset: 0x278, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[27]JPEG HUFFSYMB tables
Offset: 0x27c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[28]JPEG HUFFSYMB tables
Offset: 0x280, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[29]JPEG HUFFSYMB tables
Offset: 0x284, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[30]JPEG HUFFSYMB tables
Offset: 0x288, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[31]JPEG HUFFSYMB tables
Offset: 0x28c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[32]JPEG HUFFSYMB tables
Offset: 0x290, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[33]JPEG HUFFSYMB tables
Offset: 0x294, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[34]JPEG HUFFSYMB tables
Offset: 0x298, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[35]JPEG HUFFSYMB tables
Offset: 0x29c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[36]JPEG HUFFSYMB tables
Offset: 0x2a0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[37]JPEG HUFFSYMB tables
Offset: 0x2a4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[38]JPEG HUFFSYMB tables
Offset: 0x2a8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[39]JPEG HUFFSYMB tables
Offset: 0x2ac, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[40]JPEG HUFFSYMB tables
Offset: 0x2b0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[41]JPEG HUFFSYMB tables
Offset: 0x2b4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[42]JPEG HUFFSYMB tables
Offset: 0x2b8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[43]JPEG HUFFSYMB tables
Offset: 0x2bc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[44]JPEG HUFFSYMB tables
Offset: 0x2c0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[45]JPEG HUFFSYMB tables
Offset: 0x2c4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[46]JPEG HUFFSYMB tables
Offset: 0x2c8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[47]JPEG HUFFSYMB tables
Offset: 0x2cc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[48]JPEG HUFFSYMB tables
Offset: 0x2d0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[49]JPEG HUFFSYMB tables
Offset: 0x2d4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[50]JPEG HUFFSYMB tables
Offset: 0x2d8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[51]JPEG HUFFSYMB tables
Offset: 0x2dc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[52]JPEG HUFFSYMB tables
Offset: 0x2e0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[53]JPEG HUFFSYMB tables
Offset: 0x2e4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[54]JPEG HUFFSYMB tables
Offset: 0x2e8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[55]JPEG HUFFSYMB tables
Offset: 0x2ec, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[56]JPEG HUFFSYMB tables
Offset: 0x2f0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[57]JPEG HUFFSYMB tables
Offset: 0x2f4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[58]JPEG HUFFSYMB tables
Offset: 0x2f8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[59]JPEG HUFFSYMB tables
Offset: 0x2fc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[60]JPEG HUFFSYMB tables
Offset: 0x300, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[61]JPEG HUFFSYMB tables
Offset: 0x304, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[62]JPEG HUFFSYMB tables
Offset: 0x308, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[63]JPEG HUFFSYMB tables
Offset: 0x30c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[64]JPEG HUFFSYMB tables
Offset: 0x310, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[65]JPEG HUFFSYMB tables
Offset: 0x314, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[66]JPEG HUFFSYMB tables
Offset: 0x318, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[67]JPEG HUFFSYMB tables
Offset: 0x31c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[68]JPEG HUFFSYMB tables
Offset: 0x320, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[69]JPEG HUFFSYMB tables
Offset: 0x324, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[70]JPEG HUFFSYMB tables
Offset: 0x328, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[71]JPEG HUFFSYMB tables
Offset: 0x32c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[72]JPEG HUFFSYMB tables
Offset: 0x330, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[73]JPEG HUFFSYMB tables
Offset: 0x334, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[74]JPEG HUFFSYMB tables
Offset: 0x338, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[75]JPEG HUFFSYMB tables
Offset: 0x33c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[76]JPEG HUFFSYMB tables
Offset: 0x340, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[77]JPEG HUFFSYMB tables
Offset: 0x344, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[78]JPEG HUFFSYMB tables
Offset: 0x348, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[79]JPEG HUFFSYMB tables
Offset: 0x34c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[80]JPEG HUFFSYMB tables
Offset: 0x350, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[81]JPEG HUFFSYMB tables
Offset: 0x354, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[82]JPEG HUFFSYMB tables
Offset: 0x358, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
HUFFSYMB[83]JPEG HUFFSYMB tables
Offset: 0x35c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
Toggle fields HuffSymb_RAMBits 0-31: DHTSymb RAM.
DHTMEM[0]JPEG DHTMem tables
Offset: 0x360, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[2]JPEG DHTMem tables
Offset: 0x364, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[3]JPEG DHTMem tables
Offset: 0x368, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[4]JPEG DHTMem tables
Offset: 0x36c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[5]JPEG DHTMem tables
Offset: 0x370, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[6]JPEG DHTMem tables
Offset: 0x374, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[7]JPEG DHTMem tables
Offset: 0x378, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[8]JPEG DHTMem tables
Offset: 0x37c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[9]JPEG DHTMem tables
Offset: 0x380, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[10]JPEG DHTMem tables
Offset: 0x384, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[11]JPEG DHTMem tables
Offset: 0x388, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[12]JPEG DHTMem tables
Offset: 0x38c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[13]JPEG DHTMem tables
Offset: 0x390, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[14]JPEG DHTMem tables
Offset: 0x394, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[15]JPEG DHTMem tables
Offset: 0x398, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[16]JPEG DHTMem tables
Offset: 0x39c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[17]JPEG DHTMem tables
Offset: 0x3a0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[18]JPEG DHTMem tables
Offset: 0x3a4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[19]JPEG DHTMem tables
Offset: 0x3a8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[20]JPEG DHTMem tables
Offset: 0x3ac, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[21]JPEG DHTMem tables
Offset: 0x3b0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[22]JPEG DHTMem tables
Offset: 0x3b4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[23]JPEG DHTMem tables
Offset: 0x3b8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[24]JPEG DHTMem tables
Offset: 0x3bc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[25]JPEG DHTMem tables
Offset: 0x3c0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[26]JPEG DHTMem tables
Offset: 0x3c4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[27]JPEG DHTMem tables
Offset: 0x3c8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[28]JPEG DHTMem tables
Offset: 0x3cc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[29]JPEG DHTMem tables
Offset: 0x3d0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[30]JPEG DHTMem tables
Offset: 0x3d4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[31]JPEG DHTMem tables
Offset: 0x3d8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[32]JPEG DHTMem tables
Offset: 0x3dc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[33]JPEG DHTMem tables
Offset: 0x3e0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[34]JPEG DHTMem tables
Offset: 0x3e4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[35]JPEG DHTMem tables
Offset: 0x3e8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[36]JPEG DHTMem tables
Offset: 0x3ec, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[37]JPEG DHTMem tables
Offset: 0x3f0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[38]JPEG DHTMem tables
Offset: 0x3f4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[39]JPEG DHTMem tables
Offset: 0x3f8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[40]JPEG DHTMem tables
Offset: 0x3fc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[41]JPEG DHTMem tables
Offset: 0x400, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[42]JPEG DHTMem tables
Offset: 0x404, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[43]JPEG DHTMem tables
Offset: 0x408, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[44]JPEG DHTMem tables
Offset: 0x40c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[45]JPEG DHTMem tables
Offset: 0x410, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[46]JPEG DHTMem tables
Offset: 0x414, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[47]JPEG DHTMem tables
Offset: 0x418, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[48]JPEG DHTMem tables
Offset: 0x41c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[49]JPEG DHTMem tables
Offset: 0x420, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[50]JPEG DHTMem tables
Offset: 0x424, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[51]JPEG DHTMem tables
Offset: 0x428, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[52]JPEG DHTMem tables
Offset: 0x42c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[53]JPEG DHTMem tables
Offset: 0x430, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[54]JPEG DHTMem tables
Offset: 0x434, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[55]JPEG DHTMem tables
Offset: 0x438, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[56]JPEG DHTMem tables
Offset: 0x43c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[57]JPEG DHTMem tables
Offset: 0x440, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[58]JPEG DHTMem tables
Offset: 0x444, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[59]JPEG DHTMem tables
Offset: 0x448, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[60]JPEG DHTMem tables
Offset: 0x44c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[61]JPEG DHTMem tables
Offset: 0x450, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[62]JPEG DHTMem tables
Offset: 0x454, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[63]JPEG DHTMem tables
Offset: 0x458, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[64]JPEG DHTMem tables
Offset: 0x45c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[65]JPEG DHTMem tables
Offset: 0x460, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[66]JPEG DHTMem tables
Offset: 0x464, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[67]JPEG DHTMem tables
Offset: 0x468, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[68]JPEG DHTMem tables
Offset: 0x46c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[69]JPEG DHTMem tables
Offset: 0x470, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[70]JPEG DHTMem tables
Offset: 0x474, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[71]JPEG DHTMem tables
Offset: 0x478, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[72]JPEG DHTMem tables
Offset: 0x47c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[73]JPEG DHTMem tables
Offset: 0x480, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[74]JPEG DHTMem tables
Offset: 0x484, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[75]JPEG DHTMem tables
Offset: 0x488, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[76]JPEG DHTMem tables
Offset: 0x48c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[77]JPEG DHTMem tables
Offset: 0x490, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[78]JPEG DHTMem tables
Offset: 0x494, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[79]JPEG DHTMem tables
Offset: 0x498, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[80]JPEG DHTMem tables
Offset: 0x49c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[81]JPEG DHTMem tables
Offset: 0x4a0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[82]JPEG DHTMem tables
Offset: 0x4a4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[83]JPEG DHTMem tables
Offset: 0x4a8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[84]JPEG DHTMem tables
Offset: 0x4ac, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[85]JPEG DHTMem tables
Offset: 0x4b0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[86]JPEG DHTMem tables
Offset: 0x4b4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[87]JPEG DHTMem tables
Offset: 0x4b8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[88]JPEG DHTMem tables
Offset: 0x4bc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[89]JPEG DHTMem tables
Offset: 0x4c0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[90]JPEG DHTMem tables
Offset: 0x4c4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[91]JPEG DHTMem tables
Offset: 0x4c8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[92]JPEG DHTMem tables
Offset: 0x4cc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[93]JPEG DHTMem tables
Offset: 0x4d0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[94]JPEG DHTMem tables
Offset: 0x4d4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[95]JPEG DHTMem tables
Offset: 0x4d8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[96]JPEG DHTMem tables
Offset: 0x4dc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[97]JPEG DHTMem tables
Offset: 0x4e0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[98]JPEG DHTMem tables
Offset: 0x4e4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[99]JPEG DHTMem tables
Offset: 0x4e8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[100]JPEG DHTMem tables
Offset: 0x4ec, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[101]JPEG DHTMem tables
Offset: 0x4f0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[102]JPEG DHTMem tables
Offset: 0x4f4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
DHTMEM[103]JPEG DHTMem tables
Offset: 0x4f8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[0]JPEG encoder, AC Huffman table 0
Offset: 0x500, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[1]JPEG encoder, AC Huffman table 0
Offset: 0x504, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[2]JPEG encoder, AC Huffman table 0
Offset: 0x508, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[3]JPEG encoder, AC Huffman table 0
Offset: 0x50c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[4]JPEG encoder, AC Huffman table 0
Offset: 0x510, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[5]JPEG encoder, AC Huffman table 0
Offset: 0x514, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[6]JPEG encoder, AC Huffman table 0
Offset: 0x518, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[7]JPEG encoder, AC Huffman table 0
Offset: 0x51c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[8]JPEG encoder, AC Huffman table 0
Offset: 0x520, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[9]JPEG encoder, AC Huffman table 0
Offset: 0x524, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[10]JPEG encoder, AC Huffman table 0
Offset: 0x528, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[11]JPEG encoder, AC Huffman table 0
Offset: 0x52c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[12]JPEG encoder, AC Huffman table 0
Offset: 0x530, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[13]JPEG encoder, AC Huffman table 0
Offset: 0x534, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[14]JPEG encoder, AC Huffman table 0
Offset: 0x538, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[15]JPEG encoder, AC Huffman table 0
Offset: 0x53c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[16]JPEG encoder, AC Huffman table 0
Offset: 0x540, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[17]JPEG encoder, AC Huffman table 0
Offset: 0x544, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[18]JPEG encoder, AC Huffman table 0
Offset: 0x548, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[19]JPEG encoder, AC Huffman table 0
Offset: 0x54c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[20]JPEG encoder, AC Huffman table 0
Offset: 0x550, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[21]JPEG encoder, AC Huffman table 0
Offset: 0x554, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[22]JPEG encoder, AC Huffman table 0
Offset: 0x558, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[23]JPEG encoder, AC Huffman table 0
Offset: 0x55c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[24]JPEG encoder, AC Huffman table 0
Offset: 0x560, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[25]JPEG encoder, AC Huffman table 0
Offset: 0x564, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[26]JPEG encoder, AC Huffman table 0
Offset: 0x568, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[27]JPEG encoder, AC Huffman table 0
Offset: 0x56c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[28]JPEG encoder, AC Huffman table 0
Offset: 0x570, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[29]JPEG encoder, AC Huffman table 0
Offset: 0x574, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[30]JPEG encoder, AC Huffman table 0
Offset: 0x578, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[31]JPEG encoder, AC Huffman table 0
Offset: 0x57c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[32]JPEG encoder, AC Huffman table 0
Offset: 0x580, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[33]JPEG encoder, AC Huffman table 0
Offset: 0x584, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[34]JPEG encoder, AC Huffman table 0
Offset: 0x588, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[35]JPEG encoder, AC Huffman table 0
Offset: 0x58c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[36]JPEG encoder, AC Huffman table 0
Offset: 0x590, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[37]JPEG encoder, AC Huffman table 0
Offset: 0x594, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[38]JPEG encoder, AC Huffman table 0
Offset: 0x598, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[39]JPEG encoder, AC Huffman table 0
Offset: 0x59c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[40]JPEG encoder, AC Huffman table 0
Offset: 0x5a0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[41]JPEG encoder, AC Huffman table 0
Offset: 0x5a4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[42]JPEG encoder, AC Huffman table 0
Offset: 0x5a8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[43]JPEG encoder, AC Huffman table 0
Offset: 0x5ac, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[44]JPEG encoder, AC Huffman table 0
Offset: 0x5b0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[45]JPEG encoder, AC Huffman table 0
Offset: 0x5b4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[46]JPEG encoder, AC Huffman table 0
Offset: 0x5b8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[47]JPEG encoder, AC Huffman table 0
Offset: 0x5bc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[48]JPEG encoder, AC Huffman table 0
Offset: 0x5c0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[49]JPEG encoder, AC Huffman table 0
Offset: 0x5c4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[50]JPEG encoder, AC Huffman table 0
Offset: 0x5c8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[51]JPEG encoder, AC Huffman table 0
Offset: 0x5cc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[52]JPEG encoder, AC Huffman table 0
Offset: 0x5d0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[53]JPEG encoder, AC Huffman table 0
Offset: 0x5d4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[54]JPEG encoder, AC Huffman table 0
Offset: 0x5d8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[55]JPEG encoder, AC Huffman table 0
Offset: 0x5dc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[56]JPEG encoder, AC Huffman table 0
Offset: 0x5e0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[57]JPEG encoder, AC Huffman table 0
Offset: 0x5e4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[58]JPEG encoder, AC Huffman table 0
Offset: 0x5e8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[59]JPEG encoder, AC Huffman table 0
Offset: 0x5ec, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[60]JPEG encoder, AC Huffman table 0
Offset: 0x5f0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[61]JPEG encoder, AC Huffman table 0
Offset: 0x5f4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[62]JPEG encoder, AC Huffman table 0
Offset: 0x5f8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[63]JPEG encoder, AC Huffman table 0
Offset: 0x5fc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[64]JPEG encoder, AC Huffman table 0
Offset: 0x600, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[65]JPEG encoder, AC Huffman table 0
Offset: 0x604, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[66]JPEG encoder, AC Huffman table 0
Offset: 0x608, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[67]JPEG encoder, AC Huffman table 0
Offset: 0x60c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[68]JPEG encoder, AC Huffman table 0
Offset: 0x610, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[69]JPEG encoder, AC Huffman table 0
Offset: 0x614, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[70]JPEG encoder, AC Huffman table 0
Offset: 0x618, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[71]JPEG encoder, AC Huffman table 0
Offset: 0x61c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[72]JPEG encoder, AC Huffman table 0
Offset: 0x620, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[73]JPEG encoder, AC Huffman table 0
Offset: 0x624, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[74]JPEG encoder, AC Huffman table 0
Offset: 0x628, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[75]JPEG encoder, AC Huffman table 0
Offset: 0x62c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[76]JPEG encoder, AC Huffman table 0
Offset: 0x630, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[77]JPEG encoder, AC Huffman table 0
Offset: 0x634, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[78]JPEG encoder, AC Huffman table 0
Offset: 0x638, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[79]JPEG encoder, AC Huffman table 0
Offset: 0x63c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[80]JPEG encoder, AC Huffman table 0
Offset: 0x640, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[81]JPEG encoder, AC Huffman table 0
Offset: 0x644, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[82]JPEG encoder, AC Huffman table 0
Offset: 0x648, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[83]JPEG encoder, AC Huffman table 0
Offset: 0x64c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[84]JPEG encoder, AC Huffman table 0
Offset: 0x650, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[85]JPEG encoder, AC Huffman table 0
Offset: 0x654, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[86]JPEG encoder, AC Huffman table 0
Offset: 0x658, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC0[87]JPEG encoder, AC Huffman table 0
Offset: 0x65c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[0]JPEG encoder, AC Huffman table 1
Offset: 0x660, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[1]JPEG encoder, AC Huffman table 1
Offset: 0x664, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[2]JPEG encoder, AC Huffman table 1
Offset: 0x668, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[3]JPEG encoder, AC Huffman table 1
Offset: 0x66c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[4]JPEG encoder, AC Huffman table 1
Offset: 0x670, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[5]JPEG encoder, AC Huffman table 1
Offset: 0x674, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[6]JPEG encoder, AC Huffman table 1
Offset: 0x678, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[7]JPEG encoder, AC Huffman table 1
Offset: 0x67c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[8]JPEG encoder, AC Huffman table 1
Offset: 0x680, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[9]JPEG encoder, AC Huffman table 1
Offset: 0x684, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[10]JPEG encoder, AC Huffman table 1
Offset: 0x688, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[11]JPEG encoder, AC Huffman table 1
Offset: 0x68c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[12]JPEG encoder, AC Huffman table 1
Offset: 0x690, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[13]JPEG encoder, AC Huffman table 1
Offset: 0x694, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[14]JPEG encoder, AC Huffman table 1
Offset: 0x698, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[15]JPEG encoder, AC Huffman table 1
Offset: 0x69c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[16]JPEG encoder, AC Huffman table 1
Offset: 0x6a0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[17]JPEG encoder, AC Huffman table 1
Offset: 0x6a4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[18]JPEG encoder, AC Huffman table 1
Offset: 0x6a8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[19]JPEG encoder, AC Huffman table 1
Offset: 0x6ac, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[20]JPEG encoder, AC Huffman table 1
Offset: 0x6b0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[21]JPEG encoder, AC Huffman table 1
Offset: 0x6b4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[22]JPEG encoder, AC Huffman table 1
Offset: 0x6b8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[23]JPEG encoder, AC Huffman table 1
Offset: 0x6bc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[24]JPEG encoder, AC Huffman table 1
Offset: 0x6c0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[25]JPEG encoder, AC Huffman table 1
Offset: 0x6c4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[26]JPEG encoder, AC Huffman table 1
Offset: 0x6c8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[27]JPEG encoder, AC Huffman table 1
Offset: 0x6cc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[28]JPEG encoder, AC Huffman table 1
Offset: 0x6d0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[29]JPEG encoder, AC Huffman table 1
Offset: 0x6d4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[30]JPEG encoder, AC Huffman table 1
Offset: 0x6d8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[31]JPEG encoder, AC Huffman table 1
Offset: 0x6dc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[32]JPEG encoder, AC Huffman table 1
Offset: 0x6e0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[33]JPEG encoder, AC Huffman table 1
Offset: 0x6e4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[34]JPEG encoder, AC Huffman table 1
Offset: 0x6e8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[35]JPEG encoder, AC Huffman table 1
Offset: 0x6ec, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[36]JPEG encoder, AC Huffman table 1
Offset: 0x6f0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[37]JPEG encoder, AC Huffman table 1
Offset: 0x6f4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[38]JPEG encoder, AC Huffman table 1
Offset: 0x6f8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[39]JPEG encoder, AC Huffman table 1
Offset: 0x6fc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[40]JPEG encoder, AC Huffman table 1
Offset: 0x700, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[41]JPEG encoder, AC Huffman table 1
Offset: 0x704, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[42]JPEG encoder, AC Huffman table 1
Offset: 0x708, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[43]JPEG encoder, AC Huffman table 1
Offset: 0x70c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[44]JPEG encoder, AC Huffman table 1
Offset: 0x710, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[45]JPEG encoder, AC Huffman table 1
Offset: 0x714, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[46]JPEG encoder, AC Huffman table 1
Offset: 0x718, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[47]JPEG encoder, AC Huffman table 1
Offset: 0x71c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[48]JPEG encoder, AC Huffman table 1
Offset: 0x720, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[49]JPEG encoder, AC Huffman table 1
Offset: 0x724, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[50]JPEG encoder, AC Huffman table 1
Offset: 0x728, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[51]JPEG encoder, AC Huffman table 1
Offset: 0x72c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[52]JPEG encoder, AC Huffman table 1
Offset: 0x730, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[53]JPEG encoder, AC Huffman table 1
Offset: 0x734, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[54]JPEG encoder, AC Huffman table 1
Offset: 0x738, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[55]JPEG encoder, AC Huffman table 1
Offset: 0x73c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[56]JPEG encoder, AC Huffman table 1
Offset: 0x740, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[57]JPEG encoder, AC Huffman table 1
Offset: 0x744, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[58]JPEG encoder, AC Huffman table 1
Offset: 0x748, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[59]JPEG encoder, AC Huffman table 1
Offset: 0x74c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[60]JPEG encoder, AC Huffman table 1
Offset: 0x750, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[61]JPEG encoder, AC Huffman table 1
Offset: 0x754, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[62]JPEG encoder, AC Huffman table 1
Offset: 0x758, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[63]JPEG encoder, AC Huffman table 1
Offset: 0x75c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[64]JPEG encoder, AC Huffman table 1
Offset: 0x760, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[65]JPEG encoder, AC Huffman table 1
Offset: 0x764, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[66]JPEG encoder, AC Huffman table 1
Offset: 0x768, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[67]JPEG encoder, AC Huffman table 1
Offset: 0x76c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[68]JPEG encoder, AC Huffman table 1
Offset: 0x770, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[69]JPEG encoder, AC Huffman table 1
Offset: 0x774, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[70]JPEG encoder, AC Huffman table 1
Offset: 0x778, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[71]JPEG encoder, AC Huffman table 1
Offset: 0x77c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[72]JPEG encoder, AC Huffman table 1
Offset: 0x780, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[73]JPEG encoder, AC Huffman table 1
Offset: 0x784, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[74]JPEG encoder, AC Huffman table 1
Offset: 0x788, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[75]JPEG encoder, AC Huffman table 1
Offset: 0x78c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[76]JPEG encoder, AC Huffman table 1
Offset: 0x790, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[77]JPEG encoder, AC Huffman table 1
Offset: 0x794, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[78]JPEG encoder, AC Huffman table 1
Offset: 0x798, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[79]JPEG encoder, AC Huffman table 1
Offset: 0x79c, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[80]JPEG encoder, AC Huffman table 1
Offset: 0x7a0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[81]JPEG encoder, AC Huffman table 1
Offset: 0x7a4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[82]JPEG encoder, AC Huffman table 1
Offset: 0x7a8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[83]JPEG encoder, AC Huffman table 1
Offset: 0x7ac, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[84]JPEG encoder, AC Huffman table 1
Offset: 0x7b0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[85]JPEG encoder, AC Huffman table 1
Offset: 0x7b4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[86]JPEG encoder, AC Huffman table 1
Offset: 0x7b8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_AC1[87]JPEG encoder, AC Huffman table 1
Offset: 0x7bc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[0]JPEG encoder, DC Huffman table 0
Offset: 0x7c0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[1]JPEG encoder, DC Huffman table 0
Offset: 0x7c4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[2]JPEG encoder, DC Huffman table 0
Offset: 0x7c8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[3]JPEG encoder, DC Huffman table 0
Offset: 0x7cc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[4]JPEG encoder, DC Huffman table 0
Offset: 0x7d0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[5]JPEG encoder, DC Huffman table 0
Offset: 0x7d4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[6]JPEG encoder, DC Huffman table 0
Offset: 0x7d8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC0[7]JPEG encoder, DC Huffman table 0
Offset: 0x7dc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[0]JPEG encoder, DC Huffman table 1
Offset: 0x7e0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[1]JPEG encoder, DC Huffman table 1
Offset: 0x7e4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[2]JPEG encoder, DC Huffman table 1
Offset: 0x7e8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[3]JPEG encoder, DC Huffman table 1
Offset: 0x7ec, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[4]JPEG encoder, DC Huffman table 1
Offset: 0x7f0, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[5]JPEG encoder, DC Huffman table 1
Offset: 0x7f4, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[6]JPEG encoder, DC Huffman table 1
Offset: 0x7f8, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
HUFFENC_DC1[7]JPEG encoder, DC Huffman table 1
Offset: 0x7fc, size: 32, reset: 0x00000000, access: read-write
0/1 fields covered.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 DHTMem_RAMBits 0-31: DHTMem RAM.
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