Actually, my original solution doesn't seem to stand up to comprehensive testing, either. Essentially all it was doing was checking to see if the sum of the high-order bit positions was less than the number of bits. I created a Python equivalent for smaller width numbers. At a width of 6 bits, the following combinations aren't reported as overflows but should be: (6, 13) (6, 14) (6, 15) (7, 11) (7, 12) (7, 13) (7, 14) (7, 15) Perhaps there is some property of the false negatives that can be exploited. I don't know if it helps, but there are certainly a number of ways to narrow the field: if (src1 & HIMASK) && (src2 & HIMASK), overflow=True if !(src1 & HIMASK) && !(src2 & HIMASK), overflow=False if !src1 || !src2, overflow=False if dest < MAX(src1,src2), overflow=True if log2(src1) + log2(src2) >= width, overflow=True (the integer form of log2 can be done quite cheaply by exploiting known properties of src1 and src2 at this point) But you'd still need to filter out false negatives from that field. Perhaps there's a way, but divides would have to be really expensive for this to be worth it. -Jerry
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