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Showing content from https://lists.llvm.org/pipermail/llvm-dev/2020-July/143627.html below:

[llvm-dev] New x86-64 micro-architecture levels

[llvm-dev] New x86-64 micro-architecture levels [llvm-dev] New x86-64 micro-architecture levelsJan Beulich via llvm-dev llvm-dev at lists.llvm.org
Wed Jul 22 00:48:40 PDT 2020
On 21.07.2020 20:04, Florian Weimer wrote:
> * Premachandra Mallappa:
> 
>> [AMD Public Use]
>>
>> Hi Floarian,
>>
>>> I'm including a proposal for the levels below.  I use single letters for them, but I expect that the concrete implementation of this proposal will use 
>>> names like “x86-100”, “x86-101”, like in the glibc patch referenced above.  (But we can discuss other approaches.)
>>
>> Personally I am not a big fan of this, for 2 reasons 
>> 1. uses just x86 in name on x86_64 as well
> 
> That's deliberate, so that we can use the same x86-* names for 32-bit
> library selection (once we define matching micro-architecture levels
> there).

While indeed I did understand it to be deliberate, in the light of
64-bit only ISA extensions (like AMX, and I suspect we're going to
see more) I nevertheless think Premachandra has a point here.

Jan
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