Thanks Matt. That's really helpful. Seems like I need to rethink the pass registration a little bit. ________________________________________ From: Matt Arsenault <whatmannerofburgeristhis at gmail.com> on behalf of Matt Arsenault <arsenm2 at gmail.com> Sent: Wednesday, July 15, 2020 9:43 AM To: Chen, Yuanfang Cc: Robinson, Paul; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] [RFC] Introducing classes for the codegen driven by new pass manager > On Jul 15, 2020, at 12:39, Chen, Yuanfang <Yuanfang.Chen at sony.com> wrote: > > Indeed, but there is a distinction about their position in the pipeline. We run opt & codegen pipeline separately, âcodegenâ IR passes run with other âcodegenâ IR passes. The same goes for regular IR passes. > > Do you run âcodegenâ IR passes with regular IR passes? If so, do you mind sharing the use cases? I might have missed this use case. I suppose there are 3 cases: 1. IR passes that are run in the codegen pipeline, but also run in the regular optimization pipeline. For example, AMDGPU runs SROA and a few other ânoncodegenâ IR passes as part of codegen. These obviously are both. 2. Reducing testcases. I extract the IR at some point in the codegen pipeline, and want to see what happens if I ran other passes at that point. 3. Experiments to see if there is value in moving a codegen IR pass earlier in the pipeline, into the non-codegen IR passes -Matt
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