We are having an issue reading debug space on this board. read_debug32 won't return anything but 0, regardless of what address is specified.
The board is advertising STLink V3SET device (VID=0x0483:PID=0x374f).
test-usb utility seems to indicate that some basic functionality works.
Core_ID of 0xbe12477 being returned by test-usb utility. ST documentation seems to indicate that chip_id should be 0x477, which seems to be consistent with existing chip_id enumerations.
With st-info --probe test, word one of two word response contains 0x80 or 0x18. Second word is always 0 which defeats the ability for chip probe to determine the chip_id.
ST documentation indicates that L5 board is a feature enhancement of
L4/L4+ boards but architecture/topology is largely the same. Coded up
test chip identification structure based on STLINK_CHIPID_STM32_L46X
definition with debug code added to cause./src/common:stlink_chip_id() to a chip_id value of 0x477.
ST documentation indicates that chip has dual bank support with
SRAM1=192K and SRAM2=64K. SRAM2 is mapped at 0x0a030000 with second
mapping at 0x20030000 to be contiguous with SRAM1.
Flash size data register read for 0x1fff75e0 returns 0 with first word
of read being 0x18. Additional work would appear to be problematic
without proper functionality of the read_debug32 function.
Would appreciate any suggestions the group may have for further
investigation.
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