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Showing content from https://github.com/stlink-org/stlink/commit/ff8114895a9fc32cae6a9374e58eac6256d68183 below:

Corrected sram_size for L496x/L4A6x devices · stlink-org/stlink@ff81148 · GitHub

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@@ -6,7 +6,7 @@ chip_id 0x461 // STM32_CHIPID_L496x_L4A6x

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flash_type L4_L4P

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flash_size_reg 0x1fff75e0

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flash_pagesize 0x800 // 2 KB

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sram_size 0x40000 // 256 KB

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sram_size 0x50000 // 320 KB

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bootrom_base 0x1fff0000

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bootrom_size 0x7000 // 28 KB

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option_base 0x1fff7800 // STM32_L4_OPTION_BYTES_BASE

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