X86::BI__builtin_ia32_vcvttsd2si32:
38 caseX86::BI__builtin_ia32_vcvttsd2si64:
39 caseX86::BI__builtin_ia32_vcvttsd2usi32:
40 caseX86::BI__builtin_ia32_vcvttsd2usi64:
41 caseX86::BI__builtin_ia32_vcvttss2si32:
42 caseX86::BI__builtin_ia32_vcvttss2si64:
43 caseX86::BI__builtin_ia32_vcvttss2usi32:
44 caseX86::BI__builtin_ia32_vcvttss2usi64:
45 caseX86::BI__builtin_ia32_vcvttsh2si32:
46 caseX86::BI__builtin_ia32_vcvttsh2si64:
47 caseX86::BI__builtin_ia32_vcvttsh2usi32:
48 caseX86::BI__builtin_ia32_vcvttsh2usi64:
49 caseX86::BI__builtin_ia32_vcvttsd2sis32:
50 caseX86::BI__builtin_ia32_vcvttsd2usis32:
51 caseX86::BI__builtin_ia32_vcvttss2sis32:
52 caseX86::BI__builtin_ia32_vcvttss2usis32:
53 caseX86::BI__builtin_ia32_vcvttsd2sis64:
54 caseX86::BI__builtin_ia32_vcvttsd2usis64:
55 caseX86::BI__builtin_ia32_vcvttss2sis64:
56 caseX86::BI__builtin_ia32_vcvttss2usis64:
59 caseX86::BI__builtin_ia32_maxpd512:
60 caseX86::BI__builtin_ia32_maxps512:
61 caseX86::BI__builtin_ia32_minpd512:
62 caseX86::BI__builtin_ia32_minps512:
63 caseX86::BI__builtin_ia32_maxph512:
64 caseX86::BI__builtin_ia32_minph512:
65 caseX86::BI__builtin_ia32_vmaxpd256_round:
66 caseX86::BI__builtin_ia32_vmaxps256_round:
67 caseX86::BI__builtin_ia32_vminpd256_round:
68 caseX86::BI__builtin_ia32_vminps256_round:
69 caseX86::BI__builtin_ia32_vmaxph256_round:
70 caseX86::BI__builtin_ia32_vminph256_round:
73 caseX86::BI__builtin_ia32_vcvtph2pd512_mask:
74 caseX86::BI__builtin_ia32_vcvtph2psx512_mask:
75 caseX86::BI__builtin_ia32_cvtps2pd512_mask:
76 caseX86::BI__builtin_ia32_cvttpd2dq512_mask:
77 caseX86::BI__builtin_ia32_cvttpd2qq512_mask:
78 caseX86::BI__builtin_ia32_cvttpd2udq512_mask:
79 caseX86::BI__builtin_ia32_cvttpd2uqq512_mask:
80 caseX86::BI__builtin_ia32_cvttps2dq512_mask:
81 caseX86::BI__builtin_ia32_cvttps2qq512_mask:
82 caseX86::BI__builtin_ia32_cvttps2udq512_mask:
83 caseX86::BI__builtin_ia32_cvttps2uqq512_mask:
84 caseX86::BI__builtin_ia32_vcvttph2w512_mask:
85 caseX86::BI__builtin_ia32_vcvttph2uw512_mask:
86 caseX86::BI__builtin_ia32_vcvttph2dq512_mask:
87 caseX86::BI__builtin_ia32_vcvttph2udq512_mask:
88 caseX86::BI__builtin_ia32_vcvttph2qq512_mask:
89 caseX86::BI__builtin_ia32_vcvttph2uqq512_mask:
90 caseX86::BI__builtin_ia32_getexppd512_mask:
91 caseX86::BI__builtin_ia32_getexpps512_mask:
92 caseX86::BI__builtin_ia32_getexpph512_mask:
93 caseX86::BI__builtin_ia32_vcomisd:
94 caseX86::BI__builtin_ia32_vcomiss:
95 caseX86::BI__builtin_ia32_vcomish:
96 caseX86::BI__builtin_ia32_vcvtph2ps512_mask:
97 caseX86::BI__builtin_ia32_vgetexppd256_round_mask:
98 caseX86::BI__builtin_ia32_vgetexpps256_round_mask:
99 caseX86::BI__builtin_ia32_vgetexpph256_round_mask:
100 caseX86::BI__builtin_ia32_vcvttph2ibs256_mask:
101 caseX86::BI__builtin_ia32_vcvttph2iubs256_mask:
102 caseX86::BI__builtin_ia32_vcvttps2ibs256_mask:
103 caseX86::BI__builtin_ia32_vcvttps2iubs256_mask:
104 caseX86::BI__builtin_ia32_vcvttph2ibs512_mask:
105 caseX86::BI__builtin_ia32_vcvttph2iubs512_mask:
106 caseX86::BI__builtin_ia32_vcvttps2ibs512_mask:
107 caseX86::BI__builtin_ia32_vcvttps2iubs512_mask:
110 caseX86::BI__builtin_ia32_cmppd512_mask:
111 caseX86::BI__builtin_ia32_cmpps512_mask:
112 caseX86::BI__builtin_ia32_cmpph512_mask:
113 caseX86::BI__builtin_ia32_vcmppd256_round_mask:
114 caseX86::BI__builtin_ia32_vcmpps256_round_mask:
115 caseX86::BI__builtin_ia32_vcmpph256_round_mask:
116 caseX86::BI__builtin_ia32_cmpsd_mask:
117 caseX86::BI__builtin_ia32_cmpss_mask:
118 caseX86::BI__builtin_ia32_cmpsh_mask:
119 caseX86::BI__builtin_ia32_vcvtsh2sd_round_mask:
120 caseX86::BI__builtin_ia32_vcvtsh2ss_round_mask:
121 caseX86::BI__builtin_ia32_cvtss2sd_round_mask:
122 caseX86::BI__builtin_ia32_getexpsd128_round_mask:
123 caseX86::BI__builtin_ia32_getexpss128_round_mask:
124 caseX86::BI__builtin_ia32_getexpsh128_round_mask:
125 caseX86::BI__builtin_ia32_getmantpd512_mask:
126 caseX86::BI__builtin_ia32_getmantps512_mask:
127 caseX86::BI__builtin_ia32_getmantph512_mask:
128 caseX86::BI__builtin_ia32_vgetmantpd256_round_mask:
129 caseX86::BI__builtin_ia32_vgetmantps256_round_mask:
130 caseX86::BI__builtin_ia32_vgetmantph256_round_mask:
131 caseX86::BI__builtin_ia32_maxsd_round_mask:
132 caseX86::BI__builtin_ia32_maxss_round_mask:
133 caseX86::BI__builtin_ia32_maxsh_round_mask:
134 caseX86::BI__builtin_ia32_minsd_round_mask:
135 caseX86::BI__builtin_ia32_minss_round_mask:
136 caseX86::BI__builtin_ia32_minsh_round_mask:
137 caseX86::BI__builtin_ia32_reducepd512_mask:
138 caseX86::BI__builtin_ia32_reduceps512_mask:
139 caseX86::BI__builtin_ia32_reduceph512_mask:
140 caseX86::BI__builtin_ia32_rndscalepd_mask:
141 caseX86::BI__builtin_ia32_rndscaleps_mask:
142 caseX86::BI__builtin_ia32_rndscaleph_mask:
143 caseX86::BI__builtin_ia32_vreducepd256_round_mask:
144 caseX86::BI__builtin_ia32_vreduceps256_round_mask:
145 caseX86::BI__builtin_ia32_vreduceph256_round_mask:
146 caseX86::BI__builtin_ia32_vrndscalepd256_round_mask:
147 caseX86::BI__builtin_ia32_vrndscaleps256_round_mask:
148 caseX86::BI__builtin_ia32_vrndscaleph256_round_mask:
151 caseX86::BI__builtin_ia32_fixupimmpd512_mask:
152 caseX86::BI__builtin_ia32_fixupimmpd512_maskz:
153 caseX86::BI__builtin_ia32_fixupimmps512_mask:
154 caseX86::BI__builtin_ia32_fixupimmps512_maskz:
155 caseX86::BI__builtin_ia32_vfixupimmpd256_round_mask:
156 caseX86::BI__builtin_ia32_vfixupimmpd256_round_maskz:
157 caseX86::BI__builtin_ia32_vfixupimmps256_round_mask:
158 caseX86::BI__builtin_ia32_vfixupimmps256_round_maskz:
159 caseX86::BI__builtin_ia32_fixupimmsd_mask:
160 caseX86::BI__builtin_ia32_fixupimmsd_maskz:
161 caseX86::BI__builtin_ia32_fixupimmss_mask:
162 caseX86::BI__builtin_ia32_fixupimmss_maskz:
163 caseX86::BI__builtin_ia32_getmantsd_round_mask:
164 caseX86::BI__builtin_ia32_getmantss_round_mask:
165 caseX86::BI__builtin_ia32_getmantsh_round_mask:
166 caseX86::BI__builtin_ia32_rangepd512_mask:
167 caseX86::BI__builtin_ia32_rangeps512_mask:
168 caseX86::BI__builtin_ia32_vrangepd256_round_mask:
169 caseX86::BI__builtin_ia32_vrangeps256_round_mask:
170 caseX86::BI__builtin_ia32_rangesd128_round_mask:
171 caseX86::BI__builtin_ia32_rangess128_round_mask:
172 caseX86::BI__builtin_ia32_reducesd_mask:
173 caseX86::BI__builtin_ia32_reducess_mask:
174 caseX86::BI__builtin_ia32_reducesh_mask:
175 caseX86::BI__builtin_ia32_rndscalesd_round_mask:
176 caseX86::BI__builtin_ia32_rndscaless_round_mask:
177 caseX86::BI__builtin_ia32_rndscalesh_round_mask:
178 caseX86::BI__builtin_ia32_vminmaxpd256_round_mask:
179 caseX86::BI__builtin_ia32_vminmaxps256_round_mask:
180 caseX86::BI__builtin_ia32_vminmaxph256_round_mask:
181 caseX86::BI__builtin_ia32_vminmaxpd512_round_mask:
182 caseX86::BI__builtin_ia32_vminmaxps512_round_mask:
183 caseX86::BI__builtin_ia32_vminmaxph512_round_mask:
184 caseX86::BI__builtin_ia32_vminmaxsd_round_mask:
185 caseX86::BI__builtin_ia32_vminmaxsh_round_mask:
186 caseX86::BI__builtin_ia32_vminmaxss_round_mask:
189 caseX86::BI__builtin_ia32_vcvtsd2si64:
190 caseX86::BI__builtin_ia32_vcvtsd2si32:
191 caseX86::BI__builtin_ia32_vcvtsd2usi32:
192 caseX86::BI__builtin_ia32_vcvtsd2usi64:
193 caseX86::BI__builtin_ia32_vcvtss2si32:
194 caseX86::BI__builtin_ia32_vcvtss2si64:
195 caseX86::BI__builtin_ia32_vcvtss2usi32:
196 caseX86::BI__builtin_ia32_vcvtss2usi64:
197 caseX86::BI__builtin_ia32_vcvtsh2si32:
198 caseX86::BI__builtin_ia32_vcvtsh2si64:
199 caseX86::BI__builtin_ia32_vcvtsh2usi32:
200 caseX86::BI__builtin_ia32_vcvtsh2usi64:
201 caseX86::BI__builtin_ia32_sqrtpd512:
202 caseX86::BI__builtin_ia32_sqrtps512:
203 caseX86::BI__builtin_ia32_sqrtph512:
204 caseX86::BI__builtin_ia32_vsqrtpd256_round:
205 caseX86::BI__builtin_ia32_vsqrtps256_round:
206 caseX86::BI__builtin_ia32_vsqrtph256_round:
210 caseX86::BI__builtin_ia32_addph512:
211 caseX86::BI__builtin_ia32_divph512:
212 caseX86::BI__builtin_ia32_mulph512:
213 caseX86::BI__builtin_ia32_subph512:
214 caseX86::BI__builtin_ia32_addpd512:
215 caseX86::BI__builtin_ia32_addps512:
216 caseX86::BI__builtin_ia32_divpd512:
217 caseX86::BI__builtin_ia32_divps512:
218 caseX86::BI__builtin_ia32_mulpd512:
219 caseX86::BI__builtin_ia32_mulps512:
220 caseX86::BI__builtin_ia32_subpd512:
221 caseX86::BI__builtin_ia32_subps512:
222 caseX86::BI__builtin_ia32_vaddpd256_round:
223 caseX86::BI__builtin_ia32_vaddph256_round:
224 caseX86::BI__builtin_ia32_vaddps256_round:
225 caseX86::BI__builtin_ia32_vdivpd256_round:
226 caseX86::BI__builtin_ia32_vdivph256_round:
227 caseX86::BI__builtin_ia32_vdivps256_round:
228 caseX86::BI__builtin_ia32_vmulpd256_round:
229 caseX86::BI__builtin_ia32_vmulph256_round:
230 caseX86::BI__builtin_ia32_vmulps256_round:
231 caseX86::BI__builtin_ia32_vsubpd256_round:
232 caseX86::BI__builtin_ia32_vsubph256_round:
233 caseX86::BI__builtin_ia32_vsubps256_round:
234 caseX86::BI__builtin_ia32_cvtsi2sd64:
235 caseX86::BI__builtin_ia32_cvtsi2ss32:
236 caseX86::BI__builtin_ia32_cvtsi2ss64:
237 caseX86::BI__builtin_ia32_cvtusi2sd64:
238 caseX86::BI__builtin_ia32_cvtusi2ss32:
239 caseX86::BI__builtin_ia32_cvtusi2ss64:
240 caseX86::BI__builtin_ia32_vcvtusi2sh:
241 caseX86::BI__builtin_ia32_vcvtusi642sh:
242 caseX86::BI__builtin_ia32_vcvtsi2sh:
243 caseX86::BI__builtin_ia32_vcvtsi642sh:
247 caseX86::BI__builtin_ia32_cvtdq2ps512_mask:
248 caseX86::BI__builtin_ia32_cvtudq2ps512_mask:
249 caseX86::BI__builtin_ia32_vcvtpd2ph512_mask:
250 caseX86::BI__builtin_ia32_vcvtps2phx512_mask:
251 caseX86::BI__builtin_ia32_cvtpd2ps512_mask:
252 caseX86::BI__builtin_ia32_cvtpd2dq512_mask:
253 caseX86::BI__builtin_ia32_cvtpd2qq512_mask:
254 caseX86::BI__builtin_ia32_cvtpd2udq512_mask:
255 caseX86::BI__builtin_ia32_cvtpd2uqq512_mask:
256 caseX86::BI__builtin_ia32_cvtps2dq512_mask:
257 caseX86::BI__builtin_ia32_cvtps2qq512_mask:
258 caseX86::BI__builtin_ia32_cvtps2udq512_mask:
259 caseX86::BI__builtin_ia32_cvtps2uqq512_mask:
260 caseX86::BI__builtin_ia32_cvtqq2pd512_mask:
261 caseX86::BI__builtin_ia32_cvtqq2ps512_mask:
262 caseX86::BI__builtin_ia32_cvtuqq2pd512_mask:
263 caseX86::BI__builtin_ia32_cvtuqq2ps512_mask:
264 caseX86::BI__builtin_ia32_vcvtdq2ph512_mask:
265 caseX86::BI__builtin_ia32_vcvtudq2ph512_mask:
266 caseX86::BI__builtin_ia32_vcvtw2ph512_mask:
267 caseX86::BI__builtin_ia32_vcvtuw2ph512_mask:
268 caseX86::BI__builtin_ia32_vcvtph2w512_mask:
269 caseX86::BI__builtin_ia32_vcvtph2uw512_mask:
270 caseX86::BI__builtin_ia32_vcvtph2dq512_mask:
271 caseX86::BI__builtin_ia32_vcvtph2udq512_mask:
272 caseX86::BI__builtin_ia32_vcvtph2qq512_mask:
273 caseX86::BI__builtin_ia32_vcvtph2uqq512_mask:
274 caseX86::BI__builtin_ia32_vcvtqq2ph512_mask:
275 caseX86::BI__builtin_ia32_vcvtuqq2ph512_mask:
276 caseX86::BI__builtin_ia32_vcvtph2pd256_round_mask:
277 caseX86::BI__builtin_ia32_vcvtph2psx256_round_mask:
278 caseX86::BI__builtin_ia32_vcvtps2pd256_round_mask:
279 caseX86::BI__builtin_ia32_vcvttpd2dq256_round_mask:
280 caseX86::BI__builtin_ia32_vcvttpd2qq256_round_mask:
281 caseX86::BI__builtin_ia32_vcvttpd2udq256_round_mask:
282 caseX86::BI__builtin_ia32_vcvttpd2uqq256_round_mask:
283 caseX86::BI__builtin_ia32_vcvttps2dq256_round_mask:
284 caseX86::BI__builtin_ia32_vcvttps2qq256_round_mask:
285 caseX86::BI__builtin_ia32_vcvttps2udq256_round_mask:
286 caseX86::BI__builtin_ia32_vcvttps2uqq256_round_mask:
287 caseX86::BI__builtin_ia32_vcvttph2w256_round_mask:
288 caseX86::BI__builtin_ia32_vcvttph2uw256_round_mask:
289 caseX86::BI__builtin_ia32_vcvttph2dq256_round_mask:
290 caseX86::BI__builtin_ia32_vcvttph2udq256_round_mask:
291 caseX86::BI__builtin_ia32_vcvttph2qq256_round_mask:
292 caseX86::BI__builtin_ia32_vcvttph2uqq256_round_mask:
293 caseX86::BI__builtin_ia32_vcvtdq2ps256_round_mask:
294 caseX86::BI__builtin_ia32_vcvtudq2ps256_round_mask:
295 caseX86::BI__builtin_ia32_vcvtpd2ph256_round_mask:
296 caseX86::BI__builtin_ia32_vcvtps2phx256_round_mask:
297 caseX86::BI__builtin_ia32_vcvtpd2ps256_round_mask:
298 caseX86::BI__builtin_ia32_vcvtpd2dq256_round_mask:
299 caseX86::BI__builtin_ia32_vcvtpd2qq256_round_mask:
300 caseX86::BI__builtin_ia32_vcvtpd2udq256_round_mask:
301 caseX86::BI__builtin_ia32_vcvtpd2uqq256_round_mask:
302 caseX86::BI__builtin_ia32_vcvtps2dq256_round_mask:
303 caseX86::BI__builtin_ia32_vcvtps2qq256_round_mask:
304 caseX86::BI__builtin_ia32_vcvtps2udq256_round_mask:
305 caseX86::BI__builtin_ia32_vcvtps2uqq256_round_mask:
306 caseX86::BI__builtin_ia32_vcvtqq2pd256_round_mask:
307 caseX86::BI__builtin_ia32_vcvtqq2ps256_round_mask:
308 caseX86::BI__builtin_ia32_vcvtuqq2pd256_round_mask:
309 caseX86::BI__builtin_ia32_vcvtuqq2ps256_round_mask:
310 caseX86::BI__builtin_ia32_vcvtdq2ph256_round_mask:
311 caseX86::BI__builtin_ia32_vcvtudq2ph256_round_mask:
312 caseX86::BI__builtin_ia32_vcvtw2ph256_round_mask:
313 caseX86::BI__builtin_ia32_vcvtuw2ph256_round_mask:
314 caseX86::BI__builtin_ia32_vcvtph2w256_round_mask:
315 caseX86::BI__builtin_ia32_vcvtph2uw256_round_mask:
316 caseX86::BI__builtin_ia32_vcvtph2dq256_round_mask:
317 caseX86::BI__builtin_ia32_vcvtph2udq256_round_mask:
318 caseX86::BI__builtin_ia32_vcvtph2qq256_round_mask:
319 caseX86::BI__builtin_ia32_vcvtph2uqq256_round_mask:
320 caseX86::BI__builtin_ia32_vcvtqq2ph256_round_mask:
321 caseX86::BI__builtin_ia32_vcvtuqq2ph256_round_mask:
322 caseX86::BI__builtin_ia32_vcvtph2ibs256_mask:
323 caseX86::BI__builtin_ia32_vcvtph2iubs256_mask:
324 caseX86::BI__builtin_ia32_vcvtps2ibs256_mask:
325 caseX86::BI__builtin_ia32_vcvtps2iubs256_mask:
326 caseX86::BI__builtin_ia32_vcvtph2ibs512_mask:
327 caseX86::BI__builtin_ia32_vcvtph2iubs512_mask:
328 caseX86::BI__builtin_ia32_vcvtps2ibs512_mask:
329 caseX86::BI__builtin_ia32_vcvtps2iubs512_mask:
333 caseX86::BI__builtin_ia32_addsh_round_mask:
334 caseX86::BI__builtin_ia32_addss_round_mask:
335 caseX86::BI__builtin_ia32_addsd_round_mask:
336 caseX86::BI__builtin_ia32_divsh_round_mask:
337 caseX86::BI__builtin_ia32_divss_round_mask:
338 caseX86::BI__builtin_ia32_divsd_round_mask:
339 caseX86::BI__builtin_ia32_mulsh_round_mask:
340 caseX86::BI__builtin_ia32_mulss_round_mask:
341 caseX86::BI__builtin_ia32_mulsd_round_mask:
342 caseX86::BI__builtin_ia32_subsh_round_mask:
343 caseX86::BI__builtin_ia32_subss_round_mask:
344 caseX86::BI__builtin_ia32_subsd_round_mask:
345 caseX86::BI__builtin_ia32_scalefph512_mask:
346 caseX86::BI__builtin_ia32_scalefpd512_mask:
347 caseX86::BI__builtin_ia32_scalefps512_mask:
348 caseX86::BI__builtin_ia32_vscalefph256_round_mask:
349 caseX86::BI__builtin_ia32_vscalefpd256_round_mask:
350 caseX86::BI__builtin_ia32_vscalefps256_round_mask:
351 caseX86::BI__builtin_ia32_scalefsd_round_mask:
352 caseX86::BI__builtin_ia32_scalefss_round_mask:
353 caseX86::BI__builtin_ia32_scalefsh_round_mask:
354 caseX86::BI__builtin_ia32_cvtsd2ss_round_mask:
355 caseX86::BI__builtin_ia32_vcvtss2sh_round_mask:
356 caseX86::BI__builtin_ia32_vcvtsd2sh_round_mask:
357 caseX86::BI__builtin_ia32_sqrtsd_round_mask:
358 caseX86::BI__builtin_ia32_sqrtss_round_mask:
359 caseX86::BI__builtin_ia32_sqrtsh_round_mask:
360 caseX86::BI__builtin_ia32_vfmaddsd3_mask:
361 caseX86::BI__builtin_ia32_vfmaddsd3_maskz:
362 caseX86::BI__builtin_ia32_vfmaddsd3_mask3:
363 caseX86::BI__builtin_ia32_vfmaddss3_mask:
364 caseX86::BI__builtin_ia32_vfmaddss3_maskz:
365 caseX86::BI__builtin_ia32_vfmaddss3_mask3:
366 caseX86::BI__builtin_ia32_vfmaddsh3_mask:
367 caseX86::BI__builtin_ia32_vfmaddsh3_maskz:
368 caseX86::BI__builtin_ia32_vfmaddsh3_mask3:
369 caseX86::BI__builtin_ia32_vfmaddpd512_mask:
370 caseX86::BI__builtin_ia32_vfmaddpd512_maskz:
371 caseX86::BI__builtin_ia32_vfmaddpd512_mask3:
372 caseX86::BI__builtin_ia32_vfmsubpd512_mask3:
373 caseX86::BI__builtin_ia32_vfmaddps512_mask:
374 caseX86::BI__builtin_ia32_vfmaddps512_maskz:
375 caseX86::BI__builtin_ia32_vfmaddps512_mask3:
376 caseX86::BI__builtin_ia32_vfmsubps512_mask3:
377 caseX86::BI__builtin_ia32_vfmaddph512_mask:
378 caseX86::BI__builtin_ia32_vfmaddph512_maskz:
379 caseX86::BI__builtin_ia32_vfmaddph512_mask3:
380 caseX86::BI__builtin_ia32_vfmsubph512_mask3:
381 caseX86::BI__builtin_ia32_vfmaddsubpd512_mask:
382 caseX86::BI__builtin_ia32_vfmaddsubpd512_maskz:
383 caseX86::BI__builtin_ia32_vfmaddsubpd512_mask3:
384 caseX86::BI__builtin_ia32_vfmsubaddpd512_mask3:
385 caseX86::BI__builtin_ia32_vfmaddsubps512_mask:
386 caseX86::BI__builtin_ia32_vfmaddsubps512_maskz:
387 caseX86::BI__builtin_ia32_vfmaddsubps512_mask3:
388 caseX86::BI__builtin_ia32_vfmsubaddps512_mask3:
389 caseX86::BI__builtin_ia32_vfmaddsubph512_mask:
390 caseX86::BI__builtin_ia32_vfmaddsubph512_maskz:
391 caseX86::BI__builtin_ia32_vfmaddsubph512_mask3:
392 caseX86::BI__builtin_ia32_vfmsubaddph512_mask3:
393 caseX86::BI__builtin_ia32_vfmaddpd256_round_mask:
394 caseX86::BI__builtin_ia32_vfmaddpd256_round_maskz:
395 caseX86::BI__builtin_ia32_vfmaddpd256_round_mask3:
396 caseX86::BI__builtin_ia32_vfmsubpd256_round_mask3:
397 caseX86::BI__builtin_ia32_vfmaddps256_round_mask:
398 caseX86::BI__builtin_ia32_vfmaddps256_round_maskz:
399 caseX86::BI__builtin_ia32_vfmaddps256_round_mask3:
400 caseX86::BI__builtin_ia32_vfmsubps256_round_mask3:
401 caseX86::BI__builtin_ia32_vfmaddph256_round_mask:
402 caseX86::BI__builtin_ia32_vfmaddph256_round_maskz:
403 caseX86::BI__builtin_ia32_vfmaddph256_round_mask3:
404 caseX86::BI__builtin_ia32_vfmsubph256_round_mask3:
405 caseX86::BI__builtin_ia32_vfmaddsubpd256_round_mask:
406 caseX86::BI__builtin_ia32_vfmaddsubpd256_round_maskz:
407 caseX86::BI__builtin_ia32_vfmaddsubpd256_round_mask3:
408 caseX86::BI__builtin_ia32_vfmsubaddpd256_round_mask3:
409 caseX86::BI__builtin_ia32_vfmaddsubps256_round_mask:
410 caseX86::BI__builtin_ia32_vfmaddsubps256_round_maskz:
411 caseX86::BI__builtin_ia32_vfmaddsubps256_round_mask3:
412 caseX86::BI__builtin_ia32_vfmsubaddps256_round_mask3:
413 caseX86::BI__builtin_ia32_vfmaddsubph256_round_mask:
414 caseX86::BI__builtin_ia32_vfmaddsubph256_round_maskz:
415 caseX86::BI__builtin_ia32_vfmaddsubph256_round_mask3:
416 caseX86::BI__builtin_ia32_vfmsubaddph256_round_mask3:
417 caseX86::BI__builtin_ia32_vfmaddcph256_round_mask:
418 caseX86::BI__builtin_ia32_vfmaddcph256_round_maskz:
419 caseX86::BI__builtin_ia32_vfmaddcph256_round_mask3:
420 caseX86::BI__builtin_ia32_vfcmaddcph256_round_mask:
421 caseX86::BI__builtin_ia32_vfcmaddcph256_round_maskz:
422 caseX86::BI__builtin_ia32_vfcmaddcph256_round_mask3:
423 caseX86::BI__builtin_ia32_vfmulcph256_round_mask:
424 caseX86::BI__builtin_ia32_vfcmulcph256_round_mask:
425 caseX86::BI__builtin_ia32_vfmaddcsh_mask:
426 caseX86::BI__builtin_ia32_vfmaddcsh_round_mask:
427 caseX86::BI__builtin_ia32_vfmaddcsh_round_mask3:
428 caseX86::BI__builtin_ia32_vfmaddcph512_mask:
429 caseX86::BI__builtin_ia32_vfmaddcph512_maskz:
430 caseX86::BI__builtin_ia32_vfmaddcph512_mask3:
431 caseX86::BI__builtin_ia32_vfcmaddcsh_mask:
432 caseX86::BI__builtin_ia32_vfcmaddcsh_round_mask:
433 caseX86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
434 caseX86::BI__builtin_ia32_vfcmaddcph512_mask:
435 caseX86::BI__builtin_ia32_vfcmaddcph512_maskz:
436 caseX86::BI__builtin_ia32_vfcmaddcph512_mask3:
437 caseX86::BI__builtin_ia32_vfmulcsh_mask:
438 caseX86::BI__builtin_ia32_vfmulcph512_mask:
439 caseX86::BI__builtin_ia32_vfcmulcsh_mask:
440 caseX86::BI__builtin_ia32_vfcmulcph512_mask:
441 caseX86::BI__builtin_ia32_vcvt2ps2phx256_mask:
442 caseX86::BI__builtin_ia32_vcvt2ps2phx512_mask:
446 caseX86::BI__builtin_ia32_vcvttpd2dqs256_round_mask:
447 caseX86::BI__builtin_ia32_vcvttpd2dqs512_round_mask:
448 caseX86::BI__builtin_ia32_vcvttpd2udqs256_round_mask:
449 caseX86::BI__builtin_ia32_vcvttpd2udqs512_round_mask:
450 caseX86::BI__builtin_ia32_vcvttpd2qqs256_round_mask:
451 caseX86::BI__builtin_ia32_vcvttpd2qqs512_round_mask:
452 caseX86::BI__builtin_ia32_vcvttpd2uqqs256_round_mask:
453 caseX86::BI__builtin_ia32_vcvttpd2uqqs512_round_mask:
454 caseX86::BI__builtin_ia32_vcvttps2dqs256_round_mask:
455 caseX86::BI__builtin_ia32_vcvttps2dqs512_round_mask:
456 caseX86::BI__builtin_ia32_vcvttps2udqs256_round_mask:
457 caseX86::BI__builtin_ia32_vcvttps2udqs512_round_mask:
458 caseX86::BI__builtin_ia32_vcvttps2qqs256_round_mask:
459 caseX86::BI__builtin_ia32_vcvttps2qqs512_round_mask:
460 caseX86::BI__builtin_ia32_vcvttps2uqqs256_round_mask:
461 caseX86::BI__builtin_ia32_vcvttps2uqqs512_round_mask:
482(!HasRC &&
Result== 12
) ||
483(HasRC &&
Result.getZExtValue() >= 8 &&
Result.getZExtValue() <= 11))
486 return Diag(TheCall->
getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
497 caseX86::BI__builtin_ia32_gatherd_pd:
498 caseX86::BI__builtin_ia32_gatherd_pd256:
499 caseX86::BI__builtin_ia32_gatherq_pd:
500 caseX86::BI__builtin_ia32_gatherq_pd256:
501 caseX86::BI__builtin_ia32_gatherd_ps:
502 caseX86::BI__builtin_ia32_gatherd_ps256:
503 caseX86::BI__builtin_ia32_gatherq_ps:
504 caseX86::BI__builtin_ia32_gatherq_ps256:
505 caseX86::BI__builtin_ia32_gatherd_q:
506 caseX86::BI__builtin_ia32_gatherd_q256:
507 caseX86::BI__builtin_ia32_gatherq_q:
508 caseX86::BI__builtin_ia32_gatherq_q256:
509 caseX86::BI__builtin_ia32_gatherd_d:
510 caseX86::BI__builtin_ia32_gatherd_d256:
511 caseX86::BI__builtin_ia32_gatherq_d:
512 caseX86::BI__builtin_ia32_gatherq_d256:
513 caseX86::BI__builtin_ia32_gather3div2df:
514 caseX86::BI__builtin_ia32_gather3div2di:
515 caseX86::BI__builtin_ia32_gather3div4df:
516 caseX86::BI__builtin_ia32_gather3div4di:
517 caseX86::BI__builtin_ia32_gather3div4sf:
518 caseX86::BI__builtin_ia32_gather3div4si:
519 caseX86::BI__builtin_ia32_gather3div8sf:
520 caseX86::BI__builtin_ia32_gather3div8si:
521 caseX86::BI__builtin_ia32_gather3siv2df:
522 caseX86::BI__builtin_ia32_gather3siv2di:
523 caseX86::BI__builtin_ia32_gather3siv4df:
524 caseX86::BI__builtin_ia32_gather3siv4di:
525 caseX86::BI__builtin_ia32_gather3siv4sf:
526 caseX86::BI__builtin_ia32_gather3siv4si:
527 caseX86::BI__builtin_ia32_gather3siv8sf:
528 caseX86::BI__builtin_ia32_gather3siv8si:
529 caseX86::BI__builtin_ia32_gathersiv8df:
530 caseX86::BI__builtin_ia32_gathersiv16sf:
531 caseX86::BI__builtin_ia32_gatherdiv8df:
532 caseX86::BI__builtin_ia32_gatherdiv16sf:
533 caseX86::BI__builtin_ia32_gathersiv8di:
534 caseX86::BI__builtin_ia32_gathersiv16si:
535 caseX86::BI__builtin_ia32_gatherdiv8di:
536 caseX86::BI__builtin_ia32_gatherdiv16si:
537 caseX86::BI__builtin_ia32_scatterdiv2df:
538 caseX86::BI__builtin_ia32_scatterdiv2di:
539 caseX86::BI__builtin_ia32_scatterdiv4df:
540 caseX86::BI__builtin_ia32_scatterdiv4di:
541 caseX86::BI__builtin_ia32_scatterdiv4sf:
542 caseX86::BI__builtin_ia32_scatterdiv4si:
543 caseX86::BI__builtin_ia32_scatterdiv8sf:
544 caseX86::BI__builtin_ia32_scatterdiv8si:
545 caseX86::BI__builtin_ia32_scattersiv2df:
546 caseX86::BI__builtin_ia32_scattersiv2di:
547 caseX86::BI__builtin_ia32_scattersiv4df:
548 caseX86::BI__builtin_ia32_scattersiv4di:
549 caseX86::BI__builtin_ia32_scattersiv4sf:
550 caseX86::BI__builtin_ia32_scattersiv4si:
551 caseX86::BI__builtin_ia32_scattersiv8sf:
552 caseX86::BI__builtin_ia32_scattersiv8si:
553 caseX86::BI__builtin_ia32_scattersiv8df:
554 caseX86::BI__builtin_ia32_scattersiv16sf:
555 caseX86::BI__builtin_ia32_scatterdiv8df:
556 caseX86::BI__builtin_ia32_scatterdiv16sf:
557 caseX86::BI__builtin_ia32_scattersiv8di:
558 caseX86::BI__builtin_ia32_scattersiv16si:
559 caseX86::BI__builtin_ia32_scatterdiv8di:
560 caseX86::BI__builtin_ia32_scatterdiv16si:
579 return Diag(TheCall->
getBeginLoc(), diag::err_x86_builtin_invalid_scale)
587 for(
intArgNum : ArgNums) {
599std::bitset<TileRegHigh + 1> ArgValues;
600 for(
intArgNum : ArgNums) {
608 intArgExtValue =
Result.getExtValue();
610 "Incorrect tile register num.");
611 if(ArgValues.test(ArgExtValue))
613diag::err_x86_builtin_tile_arg_duplicate)
615ArgValues.set(ArgExtValue);
630 caseX86::BI__builtin_ia32_tileloadd64:
631 caseX86::BI__builtin_ia32_tileloaddt164:
632 caseX86::BI__builtin_ia32_tileloaddrs64:
633 caseX86::BI__builtin_ia32_tileloaddrst164:
634 caseX86::BI__builtin_ia32_tilestored64:
635 caseX86::BI__builtin_ia32_tilezero:
636 caseX86::BI__builtin_ia32_t2rpntlvwz0:
637 caseX86::BI__builtin_ia32_t2rpntlvwz0t1:
638 caseX86::BI__builtin_ia32_t2rpntlvwz1:
639 caseX86::BI__builtin_ia32_t2rpntlvwz1t1:
640 caseX86::BI__builtin_ia32_t2rpntlvwz0rst1:
641 caseX86::BI__builtin_ia32_t2rpntlvwz1rs:
642 caseX86::BI__builtin_ia32_t2rpntlvwz1rst1:
643 caseX86::BI__builtin_ia32_t2rpntlvwz0rs:
644 caseX86::BI__builtin_ia32_tcvtrowps2bf16h:
645 caseX86::BI__builtin_ia32_tcvtrowps2bf16l:
646 caseX86::BI__builtin_ia32_tcvtrowps2phh:
647 caseX86::BI__builtin_ia32_tcvtrowps2phl:
648 caseX86::BI__builtin_ia32_tcvtrowd2ps:
649 caseX86::BI__builtin_ia32_tilemovrow:
651 caseX86::BI__builtin_ia32_tdpbssd:
652 caseX86::BI__builtin_ia32_tdpbsud:
653 caseX86::BI__builtin_ia32_tdpbusd:
654 caseX86::BI__builtin_ia32_tdpbuud:
655 caseX86::BI__builtin_ia32_tdpbf16ps:
656 caseX86::BI__builtin_ia32_tdpfp16ps:
657 caseX86::BI__builtin_ia32_tcmmimfp16ps:
658 caseX86::BI__builtin_ia32_tcmmrlfp16ps:
659 caseX86::BI__builtin_ia32_tdpbf8ps:
660 caseX86::BI__builtin_ia32_tdpbhf8ps:
661 caseX86::BI__builtin_ia32_tdphbf8ps:
662 caseX86::BI__builtin_ia32_tdphf8ps:
663 caseX86::BI__builtin_ia32_ttdpbf16ps:
664 caseX86::BI__builtin_ia32_ttdpfp16ps:
665 caseX86::BI__builtin_ia32_ttcmmimfp16ps:
666 caseX86::BI__builtin_ia32_ttcmmrlfp16ps:
667 caseX86::BI__builtin_ia32_tconjtcmmimfp16ps:
668 caseX86::BI__builtin_ia32_tmmultf32ps:
669 caseX86::BI__builtin_ia32_ttmmultf32ps:
671 caseX86::BI__builtin_ia32_ttransposed:
672 caseX86::BI__builtin_ia32_tconjtfp16:
679 caseX86::BI__builtin_ia32_readeflags_u32:
680 caseX86::BI__builtin_ia32_writeeflags_u32:
690 constllvm::Triple &TT = TI.
getTriple();
693diag::err_32_bit_builtin_64_bit_tgt);
709 inti = 0, l = 0, u = 0;
713 caseX86::BI__builtin_ia32_vec_ext_v2di:
714 caseX86::BI__builtin_ia32_vextractf128_pd256:
715 caseX86::BI__builtin_ia32_vextractf128_ps256:
716 caseX86::BI__builtin_ia32_vextractf128_si256:
717 caseX86::BI__builtin_ia32_extract128i256:
718 caseX86::BI__builtin_ia32_extractf64x4_mask:
719 caseX86::BI__builtin_ia32_extracti64x4_mask:
720 caseX86::BI__builtin_ia32_extractf32x8_mask:
721 caseX86::BI__builtin_ia32_extracti32x8_mask:
722 caseX86::BI__builtin_ia32_extractf64x2_256_mask:
723 caseX86::BI__builtin_ia32_extracti64x2_256_mask:
724 caseX86::BI__builtin_ia32_extractf32x4_256_mask:
725 caseX86::BI__builtin_ia32_extracti32x4_256_mask:
730 caseX86::BI__builtin_ia32_vec_set_v2di:
731 caseX86::BI__builtin_ia32_vinsertf128_pd256:
732 caseX86::BI__builtin_ia32_vinsertf128_ps256:
733 caseX86::BI__builtin_ia32_vinsertf128_si256:
734 caseX86::BI__builtin_ia32_insert128i256:
735 caseX86::BI__builtin_ia32_insertf32x8:
736 caseX86::BI__builtin_ia32_inserti32x8:
737 caseX86::BI__builtin_ia32_insertf64x4:
738 caseX86::BI__builtin_ia32_inserti64x4:
739 caseX86::BI__builtin_ia32_insertf64x2_256:
740 caseX86::BI__builtin_ia32_inserti64x2_256:
741 caseX86::BI__builtin_ia32_insertf32x4_256:
742 caseX86::BI__builtin_ia32_inserti32x4_256:
747 caseX86::BI__builtin_ia32_vpermilpd:
748 caseX86::BI__builtin_ia32_vec_ext_v4hi:
749 caseX86::BI__builtin_ia32_vec_ext_v4si:
750 caseX86::BI__builtin_ia32_vec_ext_v4sf:
751 caseX86::BI__builtin_ia32_vec_ext_v4di:
752 caseX86::BI__builtin_ia32_extractf32x4_mask:
753 caseX86::BI__builtin_ia32_extracti32x4_mask:
754 caseX86::BI__builtin_ia32_extractf64x2_512_mask:
755 caseX86::BI__builtin_ia32_extracti64x2_512_mask:
760 caseX86::BI_mm_prefetch:
761 caseX86::BI__builtin_ia32_vec_ext_v8hi:
762 caseX86::BI__builtin_ia32_vec_ext_v8si:
767 caseX86::BI__builtin_ia32_sha1rnds4:
768 caseX86::BI__builtin_ia32_blendpd:
769 caseX86::BI__builtin_ia32_shufpd:
770 caseX86::BI__builtin_ia32_vec_set_v4hi:
771 caseX86::BI__builtin_ia32_vec_set_v4si:
772 caseX86::BI__builtin_ia32_vec_set_v4di:
773 caseX86::BI__builtin_ia32_shuf_f32x4_256:
774 caseX86::BI__builtin_ia32_shuf_f64x2_256:
775 caseX86::BI__builtin_ia32_shuf_i32x4_256:
776 caseX86::BI__builtin_ia32_shuf_i64x2_256:
777 caseX86::BI__builtin_ia32_insertf64x2_512:
778 caseX86::BI__builtin_ia32_inserti64x2_512:
779 caseX86::BI__builtin_ia32_insertf32x4:
780 caseX86::BI__builtin_ia32_inserti32x4:
785 caseX86::BI__builtin_ia32_vpermil2pd:
786 caseX86::BI__builtin_ia32_vpermil2pd256:
787 caseX86::BI__builtin_ia32_vpermil2ps:
788 caseX86::BI__builtin_ia32_vpermil2ps256:
793 caseX86::BI__builtin_ia32_cmpb128_mask:
794 caseX86::BI__builtin_ia32_cmpw128_mask:
795 caseX86::BI__builtin_ia32_cmpd128_mask:
796 caseX86::BI__builtin_ia32_cmpq128_mask:
797 caseX86::BI__builtin_ia32_cmpb256_mask:
798 caseX86::BI__builtin_ia32_cmpw256_mask:
799 caseX86::BI__builtin_ia32_cmpd256_mask:
800 caseX86::BI__builtin_ia32_cmpq256_mask:
801 caseX86::BI__builtin_ia32_cmpb512_mask:
802 caseX86::BI__builtin_ia32_cmpw512_mask:
803 caseX86::BI__builtin_ia32_cmpd512_mask:
804 caseX86::BI__builtin_ia32_cmpq512_mask:
805 caseX86::BI__builtin_ia32_ucmpb128_mask:
806 caseX86::BI__builtin_ia32_ucmpw128_mask:
807 caseX86::BI__builtin_ia32_ucmpd128_mask:
808 caseX86::BI__builtin_ia32_ucmpq128_mask:
809 caseX86::BI__builtin_ia32_ucmpb256_mask:
810 caseX86::BI__builtin_ia32_ucmpw256_mask:
811 caseX86::BI__builtin_ia32_ucmpd256_mask:
812 caseX86::BI__builtin_ia32_ucmpq256_mask:
813 caseX86::BI__builtin_ia32_ucmpb512_mask:
814 caseX86::BI__builtin_ia32_ucmpw512_mask:
815 caseX86::BI__builtin_ia32_ucmpd512_mask:
816 caseX86::BI__builtin_ia32_ucmpq512_mask:
817 caseX86::BI__builtin_ia32_vpcomub:
818 caseX86::BI__builtin_ia32_vpcomuw:
819 caseX86::BI__builtin_ia32_vpcomud:
820 caseX86::BI__builtin_ia32_vpcomuq:
821 caseX86::BI__builtin_ia32_vpcomb:
822 caseX86::BI__builtin_ia32_vpcomw:
823 caseX86::BI__builtin_ia32_vpcomd:
824 caseX86::BI__builtin_ia32_vpcomq:
825 caseX86::BI__builtin_ia32_vec_set_v8hi:
826 caseX86::BI__builtin_ia32_vec_set_v8si:
831 caseX86::BI__builtin_ia32_vpermilpd256:
832 caseX86::BI__builtin_ia32_roundps:
833 caseX86::BI__builtin_ia32_roundpd:
834 caseX86::BI__builtin_ia32_roundps256:
835 caseX86::BI__builtin_ia32_roundpd256:
836 caseX86::BI__builtin_ia32_getmantpd128_mask:
837 caseX86::BI__builtin_ia32_getmantpd256_mask:
838 caseX86::BI__builtin_ia32_getmantps128_mask:
839 caseX86::BI__builtin_ia32_getmantps256_mask:
840 caseX86::BI__builtin_ia32_getmantpd512_mask:
841 caseX86::BI__builtin_ia32_getmantps512_mask:
842 caseX86::BI__builtin_ia32_getmantph128_mask:
843 caseX86::BI__builtin_ia32_getmantph256_mask:
844 caseX86::BI__builtin_ia32_getmantph512_mask:
845 caseX86::BI__builtin_ia32_vgetmantpd256_round_mask:
846 caseX86::BI__builtin_ia32_vgetmantps256_round_mask:
847 caseX86::BI__builtin_ia32_vgetmantph256_round_mask:
848 caseX86::BI__builtin_ia32_vec_ext_v16qi:
849 caseX86::BI__builtin_ia32_vec_ext_v16hi:
854 caseX86::BI__builtin_ia32_pblendd128:
855 caseX86::BI__builtin_ia32_blendps:
856 caseX86::BI__builtin_ia32_blendpd256:
857 caseX86::BI__builtin_ia32_shufpd256:
858 caseX86::BI__builtin_ia32_roundss:
859 caseX86::BI__builtin_ia32_roundsd:
860 caseX86::BI__builtin_ia32_rangepd128_mask:
861 caseX86::BI__builtin_ia32_rangepd256_mask:
862 caseX86::BI__builtin_ia32_rangepd512_mask:
863 caseX86::BI__builtin_ia32_rangeps128_mask:
864 caseX86::BI__builtin_ia32_rangeps256_mask:
865 caseX86::BI__builtin_ia32_rangeps512_mask:
866 caseX86::BI__builtin_ia32_vrangepd256_round_mask:
867 caseX86::BI__builtin_ia32_vrangeps256_round_mask:
868 caseX86::BI__builtin_ia32_getmantsd_round_mask:
869 caseX86::BI__builtin_ia32_getmantss_round_mask:
870 caseX86::BI__builtin_ia32_getmantsh_round_mask:
871 caseX86::BI__builtin_ia32_vec_set_v16qi:
872 caseX86::BI__builtin_ia32_vec_set_v16hi:
877 caseX86::BI__builtin_ia32_vec_ext_v32qi:
882 caseX86::BI__builtin_ia32_cmpps:
883 caseX86::BI__builtin_ia32_cmpss:
884 caseX86::BI__builtin_ia32_cmppd:
885 caseX86::BI__builtin_ia32_cmpsd:
886 caseX86::BI__builtin_ia32_cmpps256:
887 caseX86::BI__builtin_ia32_cmppd256:
888 caseX86::BI__builtin_ia32_cmpps128_mask:
889 caseX86::BI__builtin_ia32_cmppd128_mask:
890 caseX86::BI__builtin_ia32_cmpps256_mask:
891 caseX86::BI__builtin_ia32_cmppd256_mask:
892 caseX86::BI__builtin_ia32_cmpps512_mask:
893 caseX86::BI__builtin_ia32_cmppd512_mask:
894 caseX86::BI__builtin_ia32_cmpph512_mask:
895 caseX86::BI__builtin_ia32_vcmppd256_round_mask:
896 caseX86::BI__builtin_ia32_vcmpps256_round_mask:
897 caseX86::BI__builtin_ia32_vcmpph256_round_mask:
898 caseX86::BI__builtin_ia32_cmpsd_mask:
899 caseX86::BI__builtin_ia32_cmpss_mask:
900 caseX86::BI__builtin_ia32_vec_set_v32qi:
905 caseX86::BI__builtin_ia32_permdf256:
906 caseX86::BI__builtin_ia32_permdi256:
907 caseX86::BI__builtin_ia32_permdf512:
908 caseX86::BI__builtin_ia32_permdi512:
909 caseX86::BI__builtin_ia32_vpermilps:
910 caseX86::BI__builtin_ia32_vpermilps256:
911 caseX86::BI__builtin_ia32_vpermilpd512:
912 caseX86::BI__builtin_ia32_vpermilps512:
913 caseX86::BI__builtin_ia32_pshufd:
914 caseX86::BI__builtin_ia32_pshufd256:
915 caseX86::BI__builtin_ia32_pshufd512:
916 caseX86::BI__builtin_ia32_pshufhw:
917 caseX86::BI__builtin_ia32_pshufhw256:
918 caseX86::BI__builtin_ia32_pshufhw512:
919 caseX86::BI__builtin_ia32_pshuflw:
920 caseX86::BI__builtin_ia32_pshuflw256:
921 caseX86::BI__builtin_ia32_pshuflw512:
922 caseX86::BI__builtin_ia32_vcvtps2ph:
923 caseX86::BI__builtin_ia32_vcvtps2ph_mask:
924 caseX86::BI__builtin_ia32_vcvtps2ph256:
925 caseX86::BI__builtin_ia32_vcvtps2ph256_mask:
926 caseX86::BI__builtin_ia32_vcvtps2ph512_mask:
927 caseX86::BI__builtin_ia32_rndscaleps_128_mask:
928 caseX86::BI__builtin_ia32_rndscalepd_128_mask:
929 caseX86::BI__builtin_ia32_rndscaleps_256_mask:
930 caseX86::BI__builtin_ia32_rndscalepd_256_mask:
931 caseX86::BI__builtin_ia32_rndscaleps_mask:
932 caseX86::BI__builtin_ia32_rndscalepd_mask:
933 caseX86::BI__builtin_ia32_rndscaleph_mask:
934 caseX86::BI__builtin_ia32_vrndscalebf16_128_mask:
935 caseX86::BI__builtin_ia32_vrndscalebf16_256_mask:
936 caseX86::BI__builtin_ia32_vrndscalebf16_mask:
937 caseX86::BI__builtin_ia32_reducepd128_mask:
938 caseX86::BI__builtin_ia32_reducepd256_mask:
939 caseX86::BI__builtin_ia32_reducepd512_mask:
940 caseX86::BI__builtin_ia32_reduceps128_mask:
941 caseX86::BI__builtin_ia32_reduceps256_mask:
942 caseX86::BI__builtin_ia32_reduceps512_mask:
943 caseX86::BI__builtin_ia32_reduceph128_mask:
944 caseX86::BI__builtin_ia32_reduceph256_mask:
945 caseX86::BI__builtin_ia32_reduceph512_mask:
946 caseX86::BI__builtin_ia32_vreducebf16128_mask:
947 caseX86::BI__builtin_ia32_vreducebf16256_mask:
948 caseX86::BI__builtin_ia32_vreducebf16512_mask:
949 caseX86::BI__builtin_ia32_vreducepd256_round_mask:
950 caseX86::BI__builtin_ia32_vreduceps256_round_mask:
951 caseX86::BI__builtin_ia32_vreduceph256_round_mask:
952 caseX86::BI__builtin_ia32_vrndscalepd256_round_mask:
953 caseX86::BI__builtin_ia32_vrndscaleps256_round_mask:
954 caseX86::BI__builtin_ia32_vrndscaleph256_round_mask:
955 caseX86::BI__builtin_ia32_prold512:
956 caseX86::BI__builtin_ia32_prolq512:
957 caseX86::BI__builtin_ia32_prold128:
958 caseX86::BI__builtin_ia32_prold256:
959 caseX86::BI__builtin_ia32_prolq128:
960 caseX86::BI__builtin_ia32_prolq256:
961 caseX86::BI__builtin_ia32_prord512:
962 caseX86::BI__builtin_ia32_prorq512:
963 caseX86::BI__builtin_ia32_prord128:
964 caseX86::BI__builtin_ia32_prord256:
965 caseX86::BI__builtin_ia32_prorq128:
966 caseX86::BI__builtin_ia32_prorq256:
967 caseX86::BI__builtin_ia32_fpclasspd128_mask:
968 caseX86::BI__builtin_ia32_fpclasspd256_mask:
969 caseX86::BI__builtin_ia32_fpclassps128_mask:
970 caseX86::BI__builtin_ia32_fpclassps256_mask:
971 caseX86::BI__builtin_ia32_fpclassps512_mask:
972 caseX86::BI__builtin_ia32_fpclasspd512_mask:
973 caseX86::BI__builtin_ia32_fpclassph128_mask:
974 caseX86::BI__builtin_ia32_fpclassph256_mask:
975 caseX86::BI__builtin_ia32_fpclassph512_mask:
976 caseX86::BI__builtin_ia32_vfpclassbf16128_mask:
977 caseX86::BI__builtin_ia32_vfpclassbf16256_mask:
978 caseX86::BI__builtin_ia32_vfpclassbf16512_mask:
979 caseX86::BI__builtin_ia32_fpclasssd_mask:
980 caseX86::BI__builtin_ia32_fpclassss_mask:
981 caseX86::BI__builtin_ia32_fpclasssh_mask:
982 caseX86::BI__builtin_ia32_pslldqi128_byteshift:
983 caseX86::BI__builtin_ia32_pslldqi256_byteshift:
984 caseX86::BI__builtin_ia32_pslldqi512_byteshift:
985 caseX86::BI__builtin_ia32_psrldqi128_byteshift:
986 caseX86::BI__builtin_ia32_psrldqi256_byteshift:
987 caseX86::BI__builtin_ia32_psrldqi512_byteshift:
988 caseX86::BI__builtin_ia32_kshiftliqi:
989 caseX86::BI__builtin_ia32_kshiftlihi:
990 caseX86::BI__builtin_ia32_kshiftlisi:
991 caseX86::BI__builtin_ia32_kshiftlidi:
992 caseX86::BI__builtin_ia32_kshiftriqi:
993 caseX86::BI__builtin_ia32_kshiftrihi:
994 caseX86::BI__builtin_ia32_kshiftrisi:
995 caseX86::BI__builtin_ia32_kshiftridi:
1000 caseX86::BI__builtin_ia32_vperm2f128_pd256:
1001 caseX86::BI__builtin_ia32_vperm2f128_ps256:
1002 caseX86::BI__builtin_ia32_vperm2f128_si256:
1003 caseX86::BI__builtin_ia32_permti256:
1004 caseX86::BI__builtin_ia32_pblendw128:
1005 caseX86::BI__builtin_ia32_pblendw256:
1006 caseX86::BI__builtin_ia32_blendps256:
1007 caseX86::BI__builtin_ia32_pblendd256:
1008 caseX86::BI__builtin_ia32_palignr128:
1009 caseX86::BI__builtin_ia32_palignr256:
1010 caseX86::BI__builtin_ia32_palignr512:
1011 caseX86::BI__builtin_ia32_alignq512:
1012 caseX86::BI__builtin_ia32_alignd512:
1013 caseX86::BI__builtin_ia32_alignd128:
1014 caseX86::BI__builtin_ia32_alignd256:
1015 caseX86::BI__builtin_ia32_alignq128:
1016 caseX86::BI__builtin_ia32_alignq256:
1017 caseX86::BI__builtin_ia32_vcomisd:
1018 caseX86::BI__builtin_ia32_vcomiss:
1019 caseX86::BI__builtin_ia32_shuf_f32x4:
1020 caseX86::BI__builtin_ia32_shuf_f64x2:
1021 caseX86::BI__builtin_ia32_shuf_i32x4:
1022 caseX86::BI__builtin_ia32_shuf_i64x2:
1023 caseX86::BI__builtin_ia32_shufpd512:
1024 caseX86::BI__builtin_ia32_shufps:
1025 caseX86::BI__builtin_ia32_shufps256:
1026 caseX86::BI__builtin_ia32_shufps512:
1027 caseX86::BI__builtin_ia32_dbpsadbw128:
1028 caseX86::BI__builtin_ia32_dbpsadbw256:
1029 caseX86::BI__builtin_ia32_dbpsadbw512:
1030 caseX86::BI__builtin_ia32_vpshldd128:
1031 caseX86::BI__builtin_ia32_vpshldd256:
1032 caseX86::BI__builtin_ia32_vpshldd512:
1033 caseX86::BI__builtin_ia32_vpshldq128:
1034 caseX86::BI__builtin_ia32_vpshldq256:
1035 caseX86::BI__builtin_ia32_vpshldq512:
1036 caseX86::BI__builtin_ia32_vpshldw128:
1037 caseX86::BI__builtin_ia32_vpshldw256:
1038 caseX86::BI__builtin_ia32_vpshldw512:
1039 caseX86::BI__builtin_ia32_vpshrdd128:
1040 caseX86::BI__builtin_ia32_vpshrdd256:
1041 caseX86::BI__builtin_ia32_vpshrdd512:
1042 caseX86::BI__builtin_ia32_vpshrdq128:
1043 caseX86::BI__builtin_ia32_vpshrdq256:
1044 caseX86::BI__builtin_ia32_vpshrdq512:
1045 caseX86::BI__builtin_ia32_vpshrdw128:
1046 caseX86::BI__builtin_ia32_vpshrdw256:
1047 caseX86::BI__builtin_ia32_vpshrdw512:
1048 caseX86::BI__builtin_ia32_vminmaxbf16128:
1049 caseX86::BI__builtin_ia32_vminmaxbf16256:
1050 caseX86::BI__builtin_ia32_vminmaxbf16512:
1051 caseX86::BI__builtin_ia32_vminmaxpd128_mask:
1052 caseX86::BI__builtin_ia32_vminmaxpd256_round_mask:
1053 caseX86::BI__builtin_ia32_vminmaxph128_mask:
1054 caseX86::BI__builtin_ia32_vminmaxph256_round_mask:
1055 caseX86::BI__builtin_ia32_vminmaxps128_mask:
1056 caseX86::BI__builtin_ia32_vminmaxps256_round_mask:
1057 caseX86::BI__builtin_ia32_vminmaxpd512_round_mask:
1058 caseX86::BI__builtin_ia32_vminmaxps512_round_mask:
1059 caseX86::BI__builtin_ia32_vminmaxph512_round_mask:
1060 caseX86::BI__builtin_ia32_vminmaxsd_round_mask:
1061 caseX86::BI__builtin_ia32_vminmaxsh_round_mask:
1062 caseX86::BI__builtin_ia32_vminmaxss_round_mask:
1067 caseX86::BI__builtin_ia32_fixupimmpd512_mask:
1068 caseX86::BI__builtin_ia32_fixupimmpd512_maskz:
1069 caseX86::BI__builtin_ia32_fixupimmps512_mask:
1070 caseX86::BI__builtin_ia32_fixupimmps512_maskz:
1071 caseX86::BI__builtin_ia32_fixupimmsd_mask:
1072 caseX86::BI__builtin_ia32_fixupimmsd_maskz:
1073 caseX86::BI__builtin_ia32_fixupimmss_mask:
1074 caseX86::BI__builtin_ia32_fixupimmss_maskz:
1075 caseX86::BI__builtin_ia32_fixupimmpd128_mask:
1076 caseX86::BI__builtin_ia32_fixupimmpd128_maskz:
1077 caseX86::BI__builtin_ia32_fixupimmpd256_mask:
1078 caseX86::BI__builtin_ia32_fixupimmpd256_maskz:
1079 caseX86::BI__builtin_ia32_fixupimmps128_mask:
1080 caseX86::BI__builtin_ia32_fixupimmps128_maskz:
1081 caseX86::BI__builtin_ia32_fixupimmps256_mask:
1082 caseX86::BI__builtin_ia32_fixupimmps256_maskz:
1083 caseX86::BI__builtin_ia32_pternlogd512_mask:
1084 caseX86::BI__builtin_ia32_pternlogd512_maskz:
1085 caseX86::BI__builtin_ia32_pternlogq512_mask:
1086 caseX86::BI__builtin_ia32_pternlogq512_maskz:
1087 caseX86::BI__builtin_ia32_pternlogd128_mask:
1088 caseX86::BI__builtin_ia32_pternlogd128_maskz:
1089 caseX86::BI__builtin_ia32_pternlogd256_mask:
1090 caseX86::BI__builtin_ia32_pternlogd256_maskz:
1091 caseX86::BI__builtin_ia32_pternlogq128_mask:
1092 caseX86::BI__builtin_ia32_pternlogq128_maskz:
1093 caseX86::BI__builtin_ia32_pternlogq256_mask:
1094 caseX86::BI__builtin_ia32_pternlogq256_maskz:
1095 caseX86::BI__builtin_ia32_vsm3rnds2:
1100 caseX86::BI__builtin_ia32_reducesd_mask:
1101 caseX86::BI__builtin_ia32_reducess_mask:
1102 caseX86::BI__builtin_ia32_rndscalesd_round_mask:
1103 caseX86::BI__builtin_ia32_rndscaless_round_mask:
1104 caseX86::BI__builtin_ia32_rndscalesh_round_mask:
1105 caseX86::BI__builtin_ia32_reducesh_mask:
1110 caseX86::BI__builtin_ia32_cmpccxadd32:
1111 caseX86::BI__builtin_ia32_cmpccxadd64:
1138cast<NamedDecl>(
D)->getDeclName().getCXXOverloadedOperator())) {
1139 Diag(AL.
getLoc(), diag::warn_attribute_wrong_decl_type)
1147diag::err_anyx86_interrupt_attribute)
1157 if(NumParams < 1 || NumParams > 2) {
1158 Diag(
D->getBeginLoc(), diag::err_anyx86_interrupt_attribute)
1159<< (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1168diag::err_anyx86_interrupt_attribute)
1169<< (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1177Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86_64
1180 if(NumParams == 2 &&
1184diag::err_anyx86_interrupt_attribute)
1185<< (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1188<< 3 << Context.getIntTypeForBitwidth(TypeSize,
false);
1191 D->addAttr(::new (Context) AnyX86InterruptAttr(Context, AL));
1192 D->addAttr(UsedAttr::CreateImplicit(Context));
1199 const auto*VD = dyn_cast<ValueDecl>(
D);
1200 if(VD && VD->getType()->isFunctionPointerType())
1203 const auto*TD = dyn_cast<TypedefNameDecl>(
D);
1204 if(TD && (TD->getUnderlyingType()->isFunctionPointerType() ||
1205TD->getUnderlyingType()->isFunctionType()))
1208 if(!isa<FunctionDecl>(
D)) {
1209 Diag(AL.
getLoc(), diag::warn_attribute_wrong_decl_type)
This file declares semantic analysis functions specific to X86.
Enumerates target-specific builtins in their own namespaces within namespace clang.
Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...
const TargetInfo & getTargetInfo() const
bool isRegularKeywordAttribute() const
SourceLocation getLoc() const
static bool isStaticOverloadedOperator(OverloadedOperatorKind OOK)
Returns true if the given operator is implicitly static in a record context.
CallExpr - Represents a function call (C99 6.5.2.2, C++ [expr.call]).
Expr * getArg(unsigned Arg)
getArg - Return the specified argument.
SourceLocation getBeginLoc() const LLVM_READONLY
Decl - This represents one declaration (or definition), e.g.
This represents one expression.
bool isValueDependent() const
Determines whether the value of this expression depends on.
bool isTypeDependent() const
Determines whether the type of this expression depends on.
ParsedAttr - Represents a syntactic attribute.
SemaDiagnosticBuilder Diag(SourceLocation Loc, unsigned DiagID, bool DeferHint=false)
Emit a diagnostic.
ASTContext & getASTContext() const
bool CheckBuiltinTileArgumentsRange(CallExpr *TheCall, ArrayRef< int > ArgNums)
void handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL)
bool CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, CallExpr *TheCall)
bool CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall)
bool CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
bool CheckBuiltinGatherScatterScale(unsigned BuiltinID, CallExpr *TheCall)
bool CheckBuiltinTileDuplicate(CallExpr *TheCall, ArrayRef< int > ArgNums)
void handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL)
bool CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall)
Sema - This implements semantic analysis and AST building for C.
bool BuiltinConstantArg(CallExpr *TheCall, int ArgNum, llvm::APSInt &Result)
BuiltinConstantArg - Handle a check if argument ArgNum of CallExpr TheCall is a constant expression.
bool BuiltinConstantArgRange(CallExpr *TheCall, int ArgNum, int Low, int High, bool RangeIsError=true)
BuiltinConstantArgRange - Handle a check if argument ArgNum of CallExpr TheCall is a constant express...
SourceRange getSourceRange() const LLVM_READONLY
SourceLocation tokens are not useful in isolation - they are low level value objects created/interpre...
SourceLocation getBeginLoc() const LLVM_READONLY
Exposes information about the current target.
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
bool isPointerType() const
Defines the clang::TargetInfo interface.
The JSON file list parser is used to communicate input to InstallAPI.
@ ExpectedFunctionWithProtoType
QualType getFunctionOrMethodResultType(const Decl *D)
bool isInstanceMethod(const Decl *D)
static bool isX86_32Builtin(unsigned BuiltinID)
SourceRange getFunctionOrMethodResultSourceRange(const Decl *D)
QualType getFunctionOrMethodParamType(const Decl *D, unsigned Idx)
@ Result
The result type of a method or function.
bool isFuncOrMethodForAttrSubject(const Decl *D)
isFuncOrMethodForAttrSubject - Return true if the given decl has function type (function or function-...
bool hasFunctionProto(const Decl *D)
hasFunctionProto - Return true if the given decl has a argument information.
unsigned getFunctionOrMethodNumParams(const Decl *D)
getFunctionOrMethodNumParams - Return number of function or method parameters.
SourceRange getFunctionOrMethodParamRange(const Decl *D, unsigned Idx)
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