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Showing content from https://clang.llvm.org/doxygen/SemaAMDGPU_8cpp_source.html below:

clang: lib/Sema/SemaAMDGPU.cpp Source File

OrderIndex, ScopeIndex;

assert(FD &&

);

llvm::StringMap<bool> CallerFeatureMap;

AMDGPU::BI__builtin_amdgcn_global_load_lds: {

SizeIdx = 2;

(Size.getSExtValue()) {

diag::err_amdgcn_global_load_lds_size_invalid_value)

diag::note_amdgcn_global_load_lds_size_valid_value)

AMDGPU::BI__builtin_amdgcn_get_fpenv:

AMDGPU::BI__builtin_amdgcn_set_fpenv:

AMDGPU::BI__builtin_amdgcn_atomic_inc32:

AMDGPU::BI__builtin_amdgcn_atomic_inc64:

AMDGPU::BI__builtin_amdgcn_atomic_dec32:

AMDGPU::BI__builtin_amdgcn_atomic_dec64:

AMDGPU::BI__builtin_amdgcn_fence:

AMDGPU::BI__builtin_amdgcn_mov_dpp:

AMDGPU::BI__builtin_amdgcn_mov_dpp8:

AMDGPU::BI__builtin_amdgcn_update_dpp: {

ArgExpr = Arg.

();

(ArgExpr->getExprLoc(), diag::err_typecheck_expect_int)

<< ArgExpr->getType();

Ord = ArgResult.

.

().getZExtValue();

(!llvm::isValidAtomicOrderingCABI(Ord))

(ArgExpr->getBeginLoc(),

diag::warn_atomic_op_has_invalid_memory_order)

<< 0 << ArgExpr->getSourceRange();

(

llvm::AtomicOrderingCABI

(Ord)) {

llvm::AtomicOrderingCABI::relaxed:

llvm::AtomicOrderingCABI::consume:

(BuiltinID == AMDGPU::BI__builtin_amdgcn_fence)

(ArgExpr->getBeginLoc(),

diag::warn_atomic_op_has_invalid_memory_order)

<< 0 << ArgExpr->getSourceRange();

llvm::AtomicOrderingCABI::acquire:

llvm::AtomicOrderingCABI::release:

llvm::AtomicOrderingCABI::acq_rel:

llvm::AtomicOrderingCABI::seq_cst:

Arg = TheCall->

(ScopeIndex);

ArgExpr = Arg.

();

(!ArgExpr->EvaluateAsConstantExpr(ArgResult1,

()))

(ArgExpr->getExprLoc(), diag::err_expr_not_string_literal)

<< ArgExpr->getType();

NumDataArgs) {

assert(NumDataArgs <= 2);

(

I = 0; I != NumDataArgs; ++I) {

Args[I] = TheCall->

(I);

ArgTys[I] = Args[I]->

();

(!ArgTys[I]->isArithmeticType() || ArgTys[I]->isAnyComplexType()) {

diag::err_typecheck_cond_expect_int_float)

(

().hasSameUnqualifiedType(ArgTys[0], ArgTys[1]))

(((ArgTys[0]->isUnsignedIntegerType() &&

ArgTys[1]->isSignedIntegerType()) ||

(ArgTys[0]->isSignedIntegerType() &&

ArgTys[1]->isUnsignedIntegerType())) &&

diag::err_typecheck_call_different_arg_types)

<< ArgTys[0] << ArgTys[1];

AMDGPUFlatWorkGroupSizeAttr &

) {

(

== 0 &&

!= 0) {

AMDGPUFlatWorkGroupSizeAttr *

AMDGPUFlatWorkGroupSizeAttr TmpAttr(Context, CI, MinExpr, MaxExpr);

return ::new (Context)

AMDGPUFlatWorkGroupSizeAttr(Context, CI, MinExpr, MaxExpr);

AMDGPUWavesPerEUAttr &

) {

(

== 0 &&

!= 0) {

AMDGPUWavesPerEUAttr *

AMDGPUWavesPerEUAttr TmpAttr(Context, CI, MinExpr, MaxExpr);

return ::new (Context) AMDGPUWavesPerEUAttr(Context, CI, MinExpr, MaxExpr);

uint32_t NumSGPR = 0;

uint32_t NumVGPR = 0;

AMDGPUMaxNumWorkGroupsAttr &

) {

*Exprs[3] = {XExpr, YExpr, ZExpr};

(

i = 0; i < 3; i++) {

AMDGPUMaxNumWorkGroupsAttr TmpAttr(Context, CI, XExpr, YExpr, ZExpr);

return ::new (Context)

AMDGPUMaxNumWorkGroupsAttr(Context, CI, XExpr, YExpr, ZExpr);

This file declares semantic analysis functions specific to AMDGPU.

Enumerates target-specific builtins in their own namespaces within namespace clang.

Holds long-lived AST nodes (such as types and decls) that can be referred to throughout the semantic ...

void getFunctionFeatureMap(llvm::StringMap< bool > &FeatureMap, const FunctionDecl *) const

Attr - This represents one attribute.

SourceLocation getLocation() const

SourceLocation getLoc() const

CallExpr - Represents a function call (C99 6.5.2.2, C++ [expr.call]).

Expr * getArg(unsigned Arg)

getArg - Return the specified argument.

Decl - This represents one declaration (or definition), e.g.

This represents one expression.

bool isValueDependent() const

Determines whether the value of this expression depends on.

SourceLocation getExprLoc() const LLVM_READONLY

getExprLoc - Return the preferred location for the arrow when diagnosing a problem with a generic exp...

ParsedAttr - Represents a syntactic attribute.

unsigned getNumArgs() const

getNumArgs - Return the number of actual arguments to this attribute.

Expr * getArgAsExpr(unsigned Arg) const

bool checkAtLeastNumArgs(class Sema &S, unsigned Num) const

Check if the attribute has at least as many args as Num.

bool checkAtMostNumArgs(class Sema &S, unsigned Num) const

Check if the attribute has at most as many args as Num.

A (possibly-)qualified type.

void handleAMDGPUMaxNumWorkGroupsAttr(Decl *D, const ParsedAttr &AL)

void addAMDGPUFlatWorkGroupSizeAttr(Decl *D, const AttributeCommonInfo &CI, Expr *Min, Expr *Max)

addAMDGPUFlatWorkGroupSizeAttr - Adds an amdgpu_flat_work_group_size attribute to a particular declar...

void handleAMDGPUFlatWorkGroupSizeAttr(Decl *D, const ParsedAttr &AL)

void handleAMDGPUNumSGPRAttr(Decl *D, const ParsedAttr &AL)

AMDGPUMaxNumWorkGroupsAttr * CreateAMDGPUMaxNumWorkGroupsAttr(const AttributeCommonInfo &CI, Expr *XExpr, Expr *YExpr, Expr *ZExpr)

Create an AMDGPUMaxNumWorkGroupsAttr attribute.

AMDGPUWavesPerEUAttr * CreateAMDGPUWavesPerEUAttr(const AttributeCommonInfo &CI, Expr *Min, Expr *Max)

Create an AMDGPUWavesPerEUAttr attribute.

void handleAMDGPUNumVGPRAttr(Decl *D, const ParsedAttr &AL)

AMDGPUFlatWorkGroupSizeAttr * CreateAMDGPUFlatWorkGroupSizeAttr(const AttributeCommonInfo &CI, Expr *Min, Expr *Max)

Create an AMDGPUWavesPerEUAttr attribute.

bool checkMovDPPFunctionCall(CallExpr *TheCall, unsigned NumArgs, unsigned NumDataArgs)

void handleAMDGPUWavesPerEUAttr(Decl *D, const ParsedAttr &AL)

bool CheckAMDGCNBuiltinFunctionCall(unsigned BuiltinID, CallExpr *TheCall)

void addAMDGPUWavesPerEUAttr(Decl *D, const AttributeCommonInfo &CI, Expr *Min, Expr *Max)

addAMDGPUWavePersEUAttr - Adds an amdgpu_waves_per_eu attribute to a particular declaration.

void addAMDGPUMaxNumWorkGroupsAttr(Decl *D, const AttributeCommonInfo &CI, Expr *XExpr, Expr *YExpr, Expr *ZExpr)

addAMDGPUMaxNumWorkGroupsAttr - Adds an amdgpu_max_num_work_groups attribute to a particular declarat...

SemaDiagnosticBuilder Diag(SourceLocation Loc, unsigned DiagID, bool DeferHint=false)

Emit a diagnostic.

ASTContext & getASTContext() const

Sema - This implements semantic analysis and AST building for C.

ExprResult VerifyIntegerConstantExpression(Expr *E, llvm::APSInt *Result, VerifyICEDiagnoser &Diagnoser, AllowFoldKind CanFold=NoFold)

VerifyIntegerConstantExpression - Verifies that an expression is an ICE, and reports the appropriate ...

FunctionDecl * getCurFunctionDecl(bool AllowLambda=false) const

Returns a pointer to the innermost enclosing function, or nullptr if the current context is not insid...

bool DiagnoseUnexpandedParameterPack(SourceLocation Loc, TypeSourceInfo *T, UnexpandedParameterPackContext UPPC)

If the given type contains an unexpanded parameter pack, diagnose the error.

bool checkUInt32Argument(const AttrInfo &AI, const Expr *Expr, uint32_t &Val, unsigned Idx=UINT_MAX, bool StrictlyUnsigned=false)

If Expr is a valid integer constant, get the value of the integer expression and return success or fa...

bool checkArgCountRange(CallExpr *Call, unsigned MinArgCount, unsigned MaxArgCount)

Checks that a call expression's argument count is in the desired range.

SourceRange getSourceRange() const LLVM_READONLY

SourceLocation tokens are not useful in isolation - they are low level value objects created/interpre...

bool evaluateRequiredTargetFeatures(llvm::StringRef RequiredFatures, const llvm::StringMap< bool > &TargetFetureMap)

Returns true if the required target features of a builtin function are enabled.

The JSON file list parser is used to communicate input to InstallAPI.

static bool checkAMDGPUMaxNumWorkGroupsArguments(Sema &S, Expr *XExpr, Expr *YExpr, Expr *ZExpr, const AMDGPUMaxNumWorkGroupsAttr &Attr)

static bool checkAMDGPUFlatWorkGroupSizeArguments(Sema &S, Expr *MinExpr, Expr *MaxExpr, const AMDGPUFlatWorkGroupSizeAttr &Attr)

static bool checkAMDGPUWavesPerEUArguments(Sema &S, Expr *MinExpr, Expr *MaxExpr, const AMDGPUWavesPerEUAttr &Attr)

EvalResult is a struct with detailed info about an evaluated expression.

APValue Val

Val - This is the value the expression can be folded to.

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