To further improve pause times, we'll need to implement concurrent class unloading for Aarch64. This is dependent on ZGC being merged.
The fundamental problem to be solved is how we implement the nmethod entry barrier, as the method used by x86 won't use - we can't atomically change an immediate address atomically. In principle we could expand on the entry barrier used already on aarch64, but perhaps expand it's applicability to nmethod entry too.
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