Daniel Berlin <dan@dberlin.org> writes:
> On Tuesday, February 19, 2002, at 11:01 AM, Kevin Jacobs wrote:
>
> > On Tue, 19 Feb 2002, Daniel Berlin wrote:
> >> On Tuesday, February 19, 2002, at 09:51 AM, Neil Schemenauer wrote:
> >>
> >>> Daniel Berlin wrote:
> >>>> When you get to optimizations, you want Advanced Compiler Design and
> >>>> Implementation by Muchnick.
> >>>
> >>> Right now I'm not planning to do any optimizations (except perhaps
> >>> limiting the number of registers used).
> >>>
> >> This is, of course, a tricky optimization to do.
> >> Limiting registers used involves splitting live ranges at the right
> >> places, etc.
> >
> > Why limit the number of registers at all? So long as they fit in L1
> > cache
> > you are golden.
>
> Err, what makes you think this?
> The largest problem on architectures like x86 is the number of registers.
> You end up with about 4 usable registers. (hardware register renaming
> only helps eliminate instruction dependencies, before someone mentions
> it).
> Performance quickly drops when you start spilling registers to the stack.
I think you misunderstand what Rattlesnake is; AIUI it is (or
will/intends to be) a register based VM for Python replacing the
current stack based VM -- I think gcc still gets to decide which x86
registers to use...
Cheers,
M.
--
ARTHUR: The ravenours bugblatter beast of Traal ... is it safe?
FORD: Oh yes, it's perfectly safe ... it's just us who are in
trouble.
-- The Hitch-Hikers Guide to the Galaxy, Episode 6
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